Commit Graph

2101 Commits

Author SHA1 Message Date
Mike Pall
71ff7ef8a7 Merge branch 'master' into v2.1 2017-01-17 12:41:05 +01:00
Mike Pall
b93a1dd0c8 Bump copyright date to 2017. 2017-01-17 12:35:03 +01:00
Mike Pall
c94b921f92 LJ_GC64: Add build options and install instructions. 2017-01-17 12:21:12 +01:00
Mike Pall
c198167690 Add some more extensions from Lua 5.2/5.3.
Contributed by François Perrad.
2017-01-17 11:37:28 +01:00
Mike Pall
ed4ce98ac1 Merge branch 'master' into v2.1 2017-01-17 10:55:41 +01:00
Mike Pall
a1e13fa6e4 Fix HTML formatting. 2017-01-17 10:55:31 +01:00
Mike Pall
12c0df4189 Merge branch 'master' into v2.1 2017-01-17 10:47:42 +01:00
Mike Pall
a2013dd39a Fix cross-endian jit.bcsave for MIPS target. 2017-01-17 10:46:45 +01:00
Mike Pall
8e5d7bec0d ARM64: Remove unused variables in disassembler.
Thanks to François Perrad.
2016-12-30 17:54:10 +01:00
Mike Pall
ebec2530be ARM64: Fuse BOR/BXOR and BNOT into ORN/EON.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
2016-12-15 22:47:40 +01:00
Mike Pall
3cfa9cb2bb Merge branch 'master' into v2.1 2016-12-15 22:46:26 +01:00
Mike Pall
fb61f7cbe3 Add "proto" field to jit.util.funcinfo().
Backport.
2016-12-15 22:45:28 +01:00
Mike Pall
1973807480 Add "proto" field to jit.util.funcinfo(). 2016-12-13 21:30:13 +01:00
Mike Pall
4ccd876a65 ARM64: Use the correct FUSE check.
Oops, my bad.
2016-12-09 18:24:48 +01:00
Mike Pall
44b99ff14d ARM64: Fuse BOR(BSHL, BSHR) into EXTR/ROR.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
2016-12-09 18:16:12 +01:00
Mike Pall
ec2756ba78 Add missing FOLD rule for 64 bit shift+BAND simplification. 2016-12-08 22:38:35 +01:00
Mike Pall
986854cbb2 ARM64: Fix code generation for S19 offsets.
Contributed by Zhongwei Yao.
2016-12-08 05:53:36 +01:00
Mike Pall
3975b6c9f4 ARM64: Fuse various BAND/BSHL/BSHR/BSAR combinations.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
2016-12-08 04:09:29 +01:00
Mike Pall
2772cbc36e ARM64: Fuse FP multiply-add/sub.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
2016-12-08 01:38:09 +01:00
Mike Pall
bfeb1167cd ARM64: Fuse XLOAD/XSTORE with STRREF/ADD/BSHL/CONV. 2016-12-07 18:40:31 +01:00
Mike Pall
2ac2cd4699 ARM64: Reorganize operand extension definitions. 2016-12-07 18:38:32 +01:00
Mike Pall
48b00297b3 ARM64: Add missing ldrb/strb instructions to disassembler.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
2016-12-07 18:34:10 +01:00
Mike Pall
22511fbe2b ARM64: Fix pc-relative loads of consts. Cleanup branch codegen.
Thanks to Zhongwei Yao.
2016-12-07 09:42:43 +01:00
Mike Pall
3ad2bbf586 ARM64: Make use of tbz/tbnz and cbz/cbnz.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
2016-11-29 19:30:40 +01:00
Mike Pall
6538c8a187 Document 47 bit limit for lightuserdata. 2016-11-25 09:23:08 +01:00
Mike Pall
d7243e1de0 Eliminate use of lightuserdata derived from static data pointers.
Required for >47 bit VA, e.g. ARM64.
2016-11-24 19:14:17 +01:00
Mike Pall
81259898ea ARM64: Emit more efficient trace exits.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
2016-11-24 18:56:19 +01:00
Mike Pall
1131fa22a2 Merge branch 'master' into v2.1 2016-11-21 16:02:41 +01:00
Mike Pall
c3cae04153 Update contact info. 2016-11-21 16:02:10 +01:00
Mike Pall
a56654460d Generalize deferred constant handling in backend to 64 bit. 2016-11-21 15:43:17 +01:00
Mike Pall
2b77da35bc ARM64: Reject special case in emit_isk13(). 2016-11-20 23:32:17 +01:00
Mike Pall
7a0c3a1127 ARM64: Allow full VA range for mcode allocation. 2016-11-20 23:17:45 +01:00
Mike Pall
04b60707d7 ARM64: Add JIT compiler backend.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
2016-11-20 22:18:14 +01:00
Mike Pall
13642b75ac Whitespace. 2016-11-20 22:14:09 +01:00
Mike Pall
202713a638 Fix amalgamated build. 2016-11-19 20:53:31 +01:00
Mike Pall
e577db52c5 Increase range of GG_State loads via IR_FLOAD with REF_NIL.
Require 32 bit alignment and store offset/4 instead.
Otherwise this can overflow the 10 bit limit for the FOLD op2 key.
2016-11-19 19:53:46 +01:00
Mike Pall
5400c1e424 MIPS: Fix TSETR barrier.
Thanks to tongwell.
2016-11-16 11:18:10 +01:00
Mike Pall
7a58a8fb3d Report parent of stitched trace.
Thanks to Nick Zavaritsky.
2016-11-13 20:03:01 +01:00
Mike Pall
716f2daef8 LJ_GC64: Various followup fixes.
Contributed by Peter Cawley.
2016-10-20 20:55:12 +02:00
Mike Pall
bdcaf4bfd9 LJ_GC64: Fix HREF for pointers.
Contributed by Peter Cawley.
2016-10-19 09:48:38 +02:00
Mike Pall
6a25014c1c LJ_FR2: Fix slot 1 handling.
Contributed by Peter Cawley.
2016-10-16 21:04:38 +02:00
Mike Pall
3f43f09413 Merge branch 'master' into v2.1 2016-10-13 18:38:22 +02:00
Mike Pall
a68c411857 Fix GC step size calculation.
Thanks to Igor Ehrlich.
2016-10-13 18:37:58 +02:00
Mike Pall
54b78e7c66 LJ_GC64: Various fixes.
Contributed by Peter Cawley.
2016-10-12 17:36:45 +02:00
Mike Pall
63465fe71d LJ_GC64: Fix jit.on/off. 2016-10-08 11:30:01 +02:00
Mike Pall
cf80edbbba Fix -jp=a mode for builtins. 2016-10-02 14:33:31 +02:00
Mike Pall
f27b2509e0 Merge branch 'master' into v2.1 2016-10-02 14:25:04 +02:00
Mike Pall
fcc8244899 ARM: Fix BLX encoding for Thumb interworking calls.
Thanks to Charles Baylis.
2016-10-02 14:24:04 +02:00
Mike Pall
4ca3909547 Merge branch 'master' into v2.1 2016-09-19 21:23:35 +02:00
Mike Pall
8ada57eb49 Looks like COLORTERM has gone out of fashion. 2016-09-19 21:22:19 +02:00