ARM64: Avoid side-effects of constant rematerialization.
Thanks to Patrick Galizia.
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f0e865dd48
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@ -295,8 +295,10 @@ static void asm_fusexref(ASMState *as, A64Ins ai, Reg rd, IRRef ref,
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} else if (asm_isk32(as, ir->op1, &ofs)) {
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ref = ir->op2;
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} else {
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Reg rn = ra_alloc1(as, ir->op1, allow);
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IRIns *irr = IR(ir->op2);
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Reg refk = irref_isk(ir->op1) ? ir->op1 : ir->op2;
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Reg refv = irref_isk(ir->op1) ? ir->op2 : ir->op1;
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Reg rn = ra_alloc1(as, refv, allow);
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IRIns *irr = IR(refk);
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uint32_t m;
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if (irr+1 == ir && !ra_used(irr) &&
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irr->o == IR_ADD && irref_isk(irr->op2)) {
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@ -307,7 +309,7 @@ static void asm_fusexref(ASMState *as, A64Ins ai, Reg rd, IRRef ref,
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goto skipopm;
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}
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}
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m = asm_fuseopm(as, 0, ir->op2, rset_exclude(allow, rn));
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m = asm_fuseopm(as, 0, refk, rset_exclude(allow, rn));
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ofs = sizeof(GCstr);
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skipopm:
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emit_lso(as, ai, rd, rd, ofs);
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@ -722,6 +724,7 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
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Reg dest = ra_dest(as, ir, allow);
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Reg tab = ra_alloc1(as, ir->op1, rset_clear(allow, dest));
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Reg key = 0, tmp = RID_TMP;
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Reg ftmp = RID_NONE, type = RID_NONE, scr = RID_NONE, tisnum = RID_NONE;
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IRRef refkey = ir->op2;
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IRIns *irkey = IR(refkey);
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int isk = irref_isk(ir->op2);
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@ -751,6 +754,28 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
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}
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}
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/* Allocate constants early. */
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if (irt_isnum(kt)) {
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if (!isk) {
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tisnum = ra_allock(as, LJ_TISNUM << 15, allow);
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ftmp = ra_scratch(as, rset_exclude(RSET_FPR, key));
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rset_clear(allow, tisnum);
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}
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} else if (irt_isaddr(kt)) {
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if (isk) {
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int64_t kk = ((int64_t)irt_toitype(irkey->t) << 47) | irkey[1].tv.u64;
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scr = ra_allock(as, kk, allow);
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} else {
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scr = ra_scratch(as, allow);
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}
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rset_clear(allow, scr);
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} else {
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lua_assert(irt_ispri(kt) && !irt_isnil(kt));
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type = ra_allock(as, ~((int64_t)~irt_toitype(ir->t) << 47), allow);
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scr = ra_scratch(as, rset_clear(allow, type));
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rset_clear(allow, scr);
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}
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/* Key not found in chain: jump to exit (if merged) or load niltv. */
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l_end = emit_label(as);
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as->invmcp = NULL;
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@ -780,9 +805,6 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
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emit_nm(as, A64I_CMPx, key, tmp);
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emit_lso(as, A64I_LDRx, tmp, dest, offsetof(Node, key.u64));
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} else {
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Reg tisnum = ra_allock(as, LJ_TISNUM << 15, allow);
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Reg ftmp = ra_scratch(as, rset_exclude(RSET_FPR, key));
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rset_clear(allow, tisnum);
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emit_nm(as, A64I_FCMPd, key, ftmp);
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emit_dn(as, A64I_FMOV_D_R, (ftmp & 31), (tmp & 31));
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emit_cond_branch(as, CC_LO, l_next);
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@ -790,31 +812,21 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
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emit_lso(as, A64I_LDRx, tmp, dest, offsetof(Node, key.n));
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}
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} else if (irt_isaddr(kt)) {
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Reg scr;
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if (isk) {
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int64_t kk = ((int64_t)irt_toitype(irkey->t) << 47) | irkey[1].tv.u64;
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scr = ra_allock(as, kk, allow);
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emit_nm(as, A64I_CMPx, scr, tmp);
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emit_lso(as, A64I_LDRx, tmp, dest, offsetof(Node, key.u64));
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} else {
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scr = ra_scratch(as, allow);
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emit_nm(as, A64I_CMPx, tmp, scr);
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emit_lso(as, A64I_LDRx, scr, dest, offsetof(Node, key.u64));
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}
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rset_clear(allow, scr);
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} else {
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Reg type, scr;
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lua_assert(irt_ispri(kt) && !irt_isnil(kt));
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type = ra_allock(as, ~((int64_t)~irt_toitype(ir->t) << 47), allow);
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scr = ra_scratch(as, rset_clear(allow, type));
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rset_clear(allow, scr);
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emit_nm(as, A64I_CMPw, scr, type);
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emit_lso(as, A64I_LDRx, scr, dest, offsetof(Node, key));
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}
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*l_loop = A64I_BCC | A64F_S19(as->mcp - l_loop) | CC_NE;
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if (!isk && irt_isaddr(kt)) {
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Reg type = ra_allock(as, (int32_t)irt_toitype(kt), allow);
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type = ra_allock(as, (int32_t)irt_toitype(kt), allow);
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emit_dnm(as, A64I_ADDx | A64F_SH(A64SH_LSL, 47), tmp, key, type);
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rset_clear(allow, type);
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}
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