topchetoeu/tal-runtime
1
0
Fork 0
Code Pull Requests Activity

Improve register allocation for loops with variable shifts.

Browse Source
This commit is contained in:
Mike Pall 2010-12-23 00:55:31 +01:00
parent c0ffe7d394
commit 6082f93919
1 changed files with 4 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/lj_asm.c
View File

@ -3801,8 +3801,11 @@ static void asm_setup_regsp(ASMState *as, GCtrace *T)
break;
/* Non-constant shift counts need to be in RID_ECX. */
case IR_BSHL: case IR_BSHR: case IR_BSAR: case IR_BROL: case IR_BROR:
if (!irref_isk(ir->op2) && !ra_hashint(IR(ir->op2)->r))
if (!irref_isk(ir->op2) && !ra_hashint(IR(ir->op2)->r)) {
IR(ir->op2)->r = REGSP_HINT(RID_ECX);
if (inloop)
rset_set(as->modset, RID_ECX);
}
break;
/* Do not propagate hints across type conversions. */
case IR_TONUM: case IR_TOINT: case IR_TOBIT: