gh-mirror/mikepaul-LuaJIT
1
0
Fork 0
mirror of https://github.com/LuaJIT/LuaJIT.git synced 2025-02-07 23:24:09 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
2,320 Commits 3 Branches 28 Tags 16 MiB
c5b8e9168b
Commit Graph

245 Commits

Author SHA1 Message Date
Mike Pall
87b111f0fe Merge branch 'master' into v2.1 2020-01-20 23:34:21 +01:00
Mike Pall
38a5ed4b43 Bump copyright date. 2020-01-20 23:26:51 +01:00
Mike Pall
94d0b53004 MIPS: Add MIPS64 R6 port. 
Contributed by Hua Zhang, YunQiang Su from Wave Computing,
and Radovan Birdic from RT-RK.
Sponsored by Wave Computing.
 2020-01-20 22:15:45 +01:00
Mike Pall
1d9a337de6 Merge branch 'master' into v2.1 2019-12-08 19:50:36 +01:00
Mike Pall
324aef08d9 Typo. 2019-12-08 19:45:07 +01:00
Mike Pall
178512fab9 Merge branch 'master' into v2.1 2019-04-29 18:04:47 +02:00
Mike Pall
9bd5a722be ARM: Fix GCC 7 -Wimplicit-fallthrough warnings. 2019-04-29 18:02:50 +02:00
Mike Pall
0bf46e1edf Merge branch 'master' into v2.1 2018-01-29 13:19:30 +01:00
Mike Pall
d4ee803427 Fix GCC 7 -Wimplicit-fallthrough warnings. 2018-01-29 13:06:13 +01:00
Mike Pall
58d0dde0a2 Fix IR_BUFPUT assembly. 
Thanks to Peter Cawley.
 2018-01-14 13:57:00 +01:00
Mike Pall
850f8c59d3 LJ_GC64: Make ASMREF_L references 64 bit. 
Reported by Yichun Zhang.
 2017-10-02 23:10:56 +02:00
Mike Pall
b4ed3219a1 LJ_GC64: Fix ir_khash for non-string GCobj. 
Contributed by Peter Cawley.
 2017-10-02 09:22:46 +02:00
Mike Pall
a057a07ab7 MIPS64: Add soft-float support to JIT compiler backend. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
 2017-06-07 23:56:54 +02:00
Mike Pall
3143b21894 ARM64: Add big-endian support. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
 2017-03-30 11:30:01 +02:00
Mike Pall
71ff7ef8a7 Merge branch 'master' into v2.1 2017-01-17 12:41:05 +01:00
Mike Pall
b93a1dd0c8 Bump copyright date to 2017. 2017-01-17 12:35:03 +01:00
Mike Pall
a56654460d Generalize deferred constant handling in backend to 64 bit. 2016-11-21 15:43:17 +01:00
Mike Pall
04b60707d7 ARM64: Add JIT compiler backend. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
 2016-11-20 22:18:14 +01:00
Mike Pall
01e4754962 Properly clean up state before restart of trace assembly. 2016-06-27 15:46:09 +02:00
Mike Pall
2868715d80 x64/LJ_GC64: Add missing backend support and enable JIT compilation. 
Contributed by Peter Cawley.
 2016-05-23 06:01:54 +02:00
Mike Pall
6c8258d74b LJ_FR2: Add support for trace recording and snapshots. 
Contributed by Peter Cawley.
 2016-05-23 01:49:00 +02:00
Mike Pall
f26679c719 LJ_GC64: Add support for 64 bit GCobj constants in the IR. 
Contributed by Peter Cawley.
 2016-05-23 00:34:05 +02:00
Mike Pall
7fb75ccc4c Embed 64 bit constants directly in the IR, using two slots. 
Contributed by Peter Cawley.
 2016-05-23 00:25:29 +02:00
Mike Pall
3152ed98ea Simplify GCtrace * reference embedding for trace stitching. 
This is now possible due to the immovable IR.
Contributed by Peter Cawley.
 2016-05-22 23:40:37 +02:00
Mike Pall
a657fa0186 Make the IR immovable after assembly. 
This allows embedding pointers to IR constants in the machine code.
Contributed by Peter Cawley.
 2016-05-22 23:25:28 +02:00
Mike Pall
513587656a Add ra_addrename(). 
Contributed by Peter Cawley.
 2016-05-21 01:45:18 +02:00
Mike Pall
1931b38da5 LJ_GC64: Introduce IRT_PGC. 
Contributed by Peter Cawley.
 2016-05-20 22:41:42 +02:00
Mike Pall
892887e584 x86: Generate BMI2 shifts and rotates, if available. 
Contributed by Peter Cawley.
 2016-03-28 23:05:20 +02:00
Mike Pall
f4231949b5 Merge branch 'master' into v2.1 2016-03-03 12:11:37 +01:00
Mike Pall
db1b399af1 Bump copyright date to 2016. 2016-03-03 12:02:22 +01:00
Mike Pall
825dcdc4d1 Generalize LJ_SOFTFP dependencies in lj_asm.c. 2016-02-09 17:29:23 +01:00
Mike Pall
0a5045c34e Merge branch 'master' into v2.1 2015-01-06 00:12:45 +01:00
Mike Pall
86913b9bbf Bump copyright date to 2015. 2015-01-05 23:59:31 +01:00
Mike Pall
054e6abe37 Add LJ_FR2 mode: Two-slot frame info. 2015-01-03 15:04:38 +01:00
Mike Pall
82e6e5fb5f x86: Fix stack slot reservation for FP math functions. 
Followup fix for commit ad03eba7.
 2014-12-16 22:25:52 +01:00
Mike Pall
ad03eba715 x86/x64: Drop internal x87 math functions. Use libm functions. 2014-12-08 02:02:34 +01:00
Mike Pall
8cc89332ff Merge branch 'master' into v2.1 2014-11-28 20:21:35 +01:00
Mike Pall
c75c62b489 Fix snapshot #0 handling for traces with a stack check on entry. 2014-11-28 20:20:12 +01:00
Mike Pall
d2809bec24 Merge branch 'master' into v2.1 2014-10-08 22:06:23 +02:00
Mike Pall
6d0654d3ec Fix fused constant loads under high register pressure. 2014-10-08 22:04:51 +02:00
Mike Pall
0e9bf2f60d Merge branch 'master' into v2.1 2014-03-06 00:42:38 +01:00
Mike Pall
416abff90d Don't access dangling reference to reallocated IR. 2014-03-06 00:39:37 +01:00
Mike Pall
a9d4543601 Merge branch 'master' into v2.1 2014-01-16 23:18:34 +01:00
Mike Pall
ef59e54820 Bump copyright date to 2014. 2014-01-16 23:10:16 +01:00
Mike Pall
c1328e9795 x86: Fix stack slot counting for IR_CALLA (affects table.new). 2013-12-26 11:03:25 +01:00
Mike Pall
e6e760ca9f Compile getfenv(0). 2013-10-09 20:34:40 +02:00
Mike Pall
c8cfca0557 Add table.new(). 2013-10-09 17:02:01 +02:00
Mike Pall
d1194a82eb Low-overhead profiler, part 4: JIT compiler support. 2013-09-08 02:53:23 +02:00
Mike Pall
517500ba48 Save currently executing lua_State in g->cur_L. 
This is only a good approximation due to deficiencies in the design of
the Lua/C API. It indicates _some_ valid state that is/was executing.
Also reorder L->cframe stores to achieve a synchronously consistent state.
 2013-08-30 23:38:17 +02:00
Mike Pall
f1f7e40318 FFI: Compile VLA/VLS and large cdata allocs with default initialization. 2013-05-24 00:49:02 +02:00