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c1c4c5599c
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125 Commits

Author SHA1 Message Date
Mike Pall
c1c4c5599c Merge branch 'master' into v2.1 2021-06-08 22:35:23 +02:00
Mike Pall
98f95f6918 DynASM/x86: Add missing escape in pattern. 2021-06-08 22:34:22 +02:00
Mike Pall
4216bdfb2a DynASM/ARM64: Fix LSL/BFI* encoding with variable shifts. 
Thanks to Dmitry Stogov.
 2021-06-04 13:51:56 +02:00
Mike Pall
5783ba1bf7 DynASM/ARM64: Fix ADRP encoding with absolute address. 
Thanks to Dmitry Stogov.
 2021-05-22 13:31:48 +02:00
Mike Pall
8dc3cd6c84 DynASM: Bump version to 1.5.0. 2021-05-02 22:29:01 +02:00
Mike Pall
0f8a340c8c DynASM/ARM64: Add .long expr. Add .quad/.addr expr + refs. 
Suggested by Dmitry Stogov, Hao Sun and Nick Gasson.
 2021-05-02 22:25:56 +02:00
Mike Pall
1449663ecf DynASM/x86: Fix x64 .aword refs. Add .qword, .quad, .addr and .long. 
Suggested by Dmitry Stogov.
 2021-05-02 22:25:16 +02:00
Mike Pall
20f556e531 DynASM: Fix global label references 
ARM64 patch contributed by Hao Sun and Nick Gasson.
 2021-03-31 18:36:44 +02:00
Mike Pall
d1132afb25 DynASM/ARM64: Add VREG support. 
Contributed by Hao Sun and Nick Gasson.
 2021-03-31 18:11:32 +02:00
Mike Pall
1e66d0f9e6 Merge branch 'master' into v2.1 2021-01-02 21:56:07 +01:00
Mike Pall
f47c864b01 Bump copyright date. 2021-01-02 21:49:41 +01:00
Mike Pall
1d8b747c16 Merge branch 'master' into v2.1 2020-10-12 16:18:02 +02:00
Mike Pall
050466552b Minor changes and https-ify links. 2020-10-12 16:11:32 +02:00
Mike Pall
cc44642cf8 Merge branch 'master' into v2.1 2020-09-12 17:36:04 +02:00
Mike Pall
412d5a4039 DynASM/x86: Fix VREG support. 2020-09-12 17:32:30 +02:00
Mike Pall
87b111f0fe Merge branch 'master' into v2.1 2020-01-20 23:34:21 +01:00
Mike Pall
38a5ed4b43 Bump copyright date. 2020-01-20 23:26:51 +01:00
Mike Pall
9749952b55 DynASM/x86: Fix BMI instructions. 
Thanks to Peter Cawley.
 2020-01-20 22:23:17 +01:00
Mike Pall
94d0b53004 MIPS: Add MIPS64 R6 port. 
Contributed by Hua Zhang, YunQiang Su from Wave Computing,
and Radovan Birdic from RT-RK.
Sponsored by Wave Computing.
 2020-01-20 22:15:45 +01:00
Mike Pall
617f532542 Merge branch 'master' into v2.1 2019-01-10 12:34:20 +01:00
Mike Pall
5c911998a3 DynASM/MIPS: Fix shadowed variable. 
Cleanup only, bug cannot trigger.
Thanks to Domingo Alvarez Duarte.
 2019-01-10 12:32:08 +01:00
Mike Pall
20e4c52945 DynASM/PPC: Fix shadowed variable. 
Cleanup only, bug cannot trigger.
Thanks to Domingo Alvarez Duarte.
 2019-01-10 12:28:24 +01:00
Mike Pall
26f1023819 DynASM/x86: Fix vroundps/vroundpd encoding. 
Thanks to Alexander Nasonov.
 2018-08-22 13:35:41 +02:00
Mike Pall
9b41062156 DynASM: Fix warning. 2018-06-24 14:10:21 +02:00
Mike Pall
cc299958bb DynASM/x86: Add FMA3 instructions. 
Thanks to Alexander Nasonov.
 2018-06-05 12:23:13 +02:00
Mike Pall
fe651bf6e2 DynASM/x86: Add BMI1 and BMI2 instructions. 
Thanks to Peter Cawley.
 2018-02-27 23:22:40 +01:00
Mike Pall
0bf46e1edf Merge branch 'master' into v2.1 2018-01-29 13:19:30 +01:00
Mike Pall
d4ee803427 Fix GCC 7 -Wimplicit-fallthrough warnings. 2018-01-29 13:06:13 +01:00
Mike Pall
6a2d8b0b4d Merge branch 'master' into v2.1 2017-09-20 19:42:34 +02:00
Mike Pall
0c0e7b168e DynASM/x86: Fix potential REL_A overflow. 
Thanks to Joshua Haberman.
 2017-09-20 19:39:50 +02:00
Mike Pall
a9740d9edb DynASM: Fix warning. 2017-03-08 21:59:14 +01:00
Mike Pall
71ff7ef8a7 Merge branch 'master' into v2.1 2017-01-17 12:41:05 +01:00
Mike Pall
b93a1dd0c8 Bump copyright date to 2017. 2017-01-17 12:35:03 +01:00
Mike Pall
e3c4c9af0f DynASM/MIPS: Add missing MIPS64 instructions. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
 2016-05-28 05:09:24 +02:00
Mike Pall
75d046dbdd DynASM/x86: Add ADX instructions. 
Thanks to Peter Cawley.
 2016-03-06 12:25:03 +01:00
Mike Pall
f4231949b5 Merge branch 'master' into v2.1 2016-03-03 12:11:37 +01:00
Mike Pall
db1b399af1 Bump copyright date to 2016. 2016-03-03 12:02:22 +01:00
Mike Pall
22e7b00ddb DynASM/x64: Fix for full VREG support. 
Thanks to Peter Cawley.
 2015-12-28 17:06:48 +01:00
Mike Pall
cfae3846f8 DynASM/x86: Add AVX AES instructions. 
Contributed by Peter Cawley.
 2015-12-28 16:40:39 +01:00
Mike Pall
a687a60eaa DynASM/x64: Add full VREG support. 
Contributed by Peter Cawley.
 2015-12-28 13:44:13 +01:00
Mike Pall
0aa337a41c Merge branch 'master' into v2.1 2015-11-04 14:09:59 +01:00
Mike Pall
367cba29ea DynASM/x86: Add rdpmc instruction. 
Thanks to Cosmin Apreutesei.
 2015-11-04 14:04:19 +01:00
Mike Pall
4c08158be4 Whitespace. 2015-10-24 18:53:37 +02:00
Mike Pall
d62dc01984 DynASM: Bump version to 1.4. 
Thanks to Peter Cawley.
 2015-10-24 18:46:45 +02:00
Mike Pall
8a13c9cebf DynASM/x86: Add AVX and AVX2 opcodes. 
Thanks to Peter Cawley.
 2015-10-24 18:43:47 +02:00
Mike Pall
7e22082480 DynASM/x86: Add AES-NI opcodes. 
Thanks to Peter Cawley.
 2015-10-24 18:18:52 +02:00
Mike Pall
e54ca424b5 Merge branch 'master' into v2.1 2015-10-24 18:18:07 +02:00
Mike Pall
7579b161af DynASM/x86: Restrict shld/shrd to operands with same width. 
Thanks to Peter Cawley.
 2015-10-24 18:15:44 +02:00
Mike Pall
9dc785e0af DynASM/x86: Fix some SSE instruction templates. 
Thanks to Peter Cawley.
 2015-10-24 18:12:40 +02:00
Mike Pall
1c968d5b63 DynASM/PPC: Add sub/shift/rotate/clear instruction aliases. 2015-04-12 03:46:16 +02:00