18 Commits

Author	SHA1	Message	Date
Mike Pall	8358eb0cce	Merge branch 'master' into v2.1	2025-01-13 16:15:19 +01:00
Mike Pall	656ecbcf8f	DynASM/ARM64: Support ldp/stp of q registers. ... Thanks to Peter Cawley. #1096	2023-10-08 22:12:01 +02:00
Mike Pall	ef587afb2c	Merge branch 'master' into v2.1	2023-08-20 21:33:37 +02:00
Mike Pall	117ddf35e6	DynASM/ARM64: Add instructions for ARM64e PAC. ... Contributed by Peter Cawley. #559	2023-08-12 22:24:00 +02:00
Mike Pall	68bb11405c	DynASM/ARM64: Fix LSL/BFI* encoding with variable registers. ... Thanks to Dmitry Stogov.	2022-06-02 13:48:04 +02:00
Mike Pall	7306ba78d6	Merge branch 'master' into v2.1	2022-01-15 19:42:30 +01:00
Mike Pall	4216bdfb2a	DynASM/ARM64: Fix LSL/BFI* encoding with variable shifts. ... Thanks to Dmitry Stogov.	2021-06-04 13:51:56 +02:00
Mike Pall	8dc3cd6c84	DynASM: Bump version to 1.5.0.	2021-05-02 22:29:01 +02:00
Mike Pall	0f8a340c8c	DynASM/ARM64: Add .long expr. Add .quad/.addr expr + refs. ... Suggested by Dmitry Stogov, Hao Sun and Nick Gasson.	2021-05-02 22:25:56 +02:00
Mike Pall	d1132afb25	DynASM/ARM64: Add VREG support. ... Contributed by Hao Sun and Nick Gasson.	2021-03-31 18:11:32 +02:00
Mike Pall	1e66d0f9e6	Merge branch 'master' into v2.1	2021-01-02 21:56:07 +01:00
Mike Pall	87b111f0fe	Merge branch 'master' into v2.1	2020-01-20 23:34:21 +01:00
Mike Pall	71ff7ef8a7	Merge branch 'master' into v2.1	2017-01-17 12:41:05 +01:00
Mike Pall	f4231949b5	Merge branch 'master' into v2.1	2016-03-03 12:11:37 +01:00
Mike Pall	d62dc01984	DynASM: Bump version to 1.4. ... Thanks to Peter Cawley.	2015-10-24 18:46:45 +02:00
Mike Pall	0a5045c34e	Merge branch 'master' into v2.1	2015-01-06 00:12:45 +01:00
Mike Pall	a13dfd66c3	DynASM/ARM64: Various fixes.	2014-12-27 06:13:48 +01:00
Mike Pall	f49c61a277	DynASM/ARM64: Initial commit of ARM64 module.	2014-12-03 14:12:02 +01:00