83 Commits

Author	SHA1	Message	Date
Mike Pall	98f95f6918	DynASM/x86: Add missing escape in pattern.	2021-06-08 22:34:22 +02:00
Mike Pall	f47c864b01	Bump copyright date.	2021-01-02 21:49:41 +01:00
Mike Pall	050466552b	Minor changes and https-ify links.	2020-10-12 16:11:32 +02:00
Mike Pall	412d5a4039	DynASM/x86: Fix VREG support.	2020-09-12 17:32:30 +02:00
Mike Pall	38a5ed4b43	Bump copyright date.	2020-01-20 23:26:51 +01:00
Mike Pall	5c911998a3	DynASM/MIPS: Fix shadowed variable. ... Cleanup only, bug cannot trigger. Thanks to Domingo Alvarez Duarte.	2019-01-10 12:32:08 +01:00
Mike Pall	20e4c52945	DynASM/PPC: Fix shadowed variable. ... Cleanup only, bug cannot trigger. Thanks to Domingo Alvarez Duarte.	2019-01-10 12:28:24 +01:00
Mike Pall	d4ee803427	Fix GCC 7 -Wimplicit-fallthrough warnings.	2018-01-29 13:06:13 +01:00
Mike Pall	0c0e7b168e	DynASM/x86: Fix potential REL_A overflow. ... Thanks to Joshua Haberman.	2017-09-20 19:39:50 +02:00
Mike Pall	a9740d9edb	DynASM: Fix warning.	2017-03-08 21:59:14 +01:00
Mike Pall	b93a1dd0c8	Bump copyright date to 2017.	2017-01-17 12:35:03 +01:00
Mike Pall	db1b399af1	Bump copyright date to 2016.	2016-03-03 12:02:22 +01:00
Mike Pall	367cba29ea	DynASM/x86: Add rdpmc instruction. ... Thanks to Cosmin Apreutesei.	2015-11-04 14:04:19 +01:00
Mike Pall	7579b161af	DynASM/x86: Restrict shld/shrd to operands with same width. ... Thanks to Peter Cawley.	2015-10-24 18:15:44 +02:00
Mike Pall	9dc785e0af	DynASM/x86: Fix some SSE instruction templates. ... Thanks to Peter Cawley.	2015-10-24 18:12:40 +02:00
Mike Pall	86913b9bbf	Bump copyright date to 2015.	2015-01-05 23:59:31 +01:00
Mike Pall	db7cb5ab0e	DynASM/ARM: Fix rollback for variant templates.	2014-12-27 06:08:36 +01:00
Mike Pall	3f2e4ec699	DynASM/ARM: Fix description shown for multi-element templates.	2014-12-03 14:09:17 +01:00
Mike Pall	cb886b5817	DynASM/x86: Add fldenv, f[n]stenv, fxsave, fxrstor opcodes. ... Thanks to Cosmin Apreutesei.	2014-09-22 13:44:28 +02:00
Mike Pall	ae7d4d5ad6	DynASM/x86: Add shld/shrd opcodes. ... Thanks to Peter Cawley.	2014-09-21 18:03:47 +02:00
Mike Pall	80efb07750	DynASM: Emit version check after .arch directive.	2014-03-06 17:54:48 +01:00
Mike Pall	ef59e54820	Bump copyright date to 2014.	2014-01-16 23:10:16 +01:00
Mike Pall	1f7b326217	DynASM: Emit #line <n> <file> instead of #<n> <file>.	2013-09-12 12:46:28 +02:00
Mike Pall	ec96d8b494	DynASM/x64: Add VREG support to mov64. ... Thanks to Peter Cawley.	2013-07-18 08:51:32 +02:00
Mike Pall	b2a13ddd74	DynASM/x86: Add lock prefix.	2013-06-24 12:20:25 +02:00
Mike Pall	d147eedac9	DynASM: Improve validation of local backwards relocations.	2013-03-17 14:20:40 +01:00
Mike Pall	4a44c4ff69	Bump copyright date to 2013.	2013-02-11 12:54:48 +01:00
Mike Pall	894d2d6ef4	DynASM/ARM: Fix conditional VFP instruction encoding.	2012-10-15 16:52:18 +02:00
Mike Pall	2d58872cb5	DynASM/ARM: Add VFP instructions.	2012-07-29 12:16:33 +02:00
Mike Pall	c00ffcb870	Change DynASM bit operations to use Lua BitOp.	2012-07-08 16:27:18 +02:00
Mike Pall	6b605bd455	DynASM/PPC: Add missing 64 bit rotates and mtocrf/mfocrf.	2012-06-12 16:47:25 +02:00
Mike Pall	6c8aaef2bb	DynASM: Compatibility with minilua.	2012-06-09 14:42:03 +02:00
Mike Pall	6c05739684	DynASM: Lua 5.2 compatibility fixes.	2012-02-17 11:40:18 +01:00
Mike Pall	10ef109eef	Bump copyright date to 2012.	2012-01-23 22:42:42 +01:00
Mike Pall	b9651b4ba2	MIPS: Add missing opcodes to the DynASM MIPS module plus minor fixes. ... Allow single dot as macro name.	2012-01-23 19:06:58 +01:00
Mike Pall	ba4917b71b	MIPS: Add DynASM MIPS module and encoding engine.	2011-12-16 21:33:40 +01:00
Mike Pall	9df9c7ef73	PPC: Fix externally provided relocation offsets in DynASM.	2011-10-25 01:18:59 +02:00
Mike Pall	e2b89de92d	PPC: Add y-bit variants of conditional branches to DynASM.	2011-09-05 18:26:08 +02:00
Mike Pall	ec1b70ae35	PPC: Add PPC disassembler.	2011-08-18 19:41:27 +02:00
Mike Pall	b500b50edc	Clarify name of MIT license.	2011-08-14 21:18:58 +02:00
Mike Pall	5385809d30	PPC: Add mtcrf instruction to DynASM.	2011-08-10 21:50:11 +02:00
Mike Pall	fe1f9137a9	PPC: Fix range check for scaled immediates in DynASM.	2011-07-02 00:43:19 +02:00
Mike Pall	f0a7293e58	ARM: Remove redundant parse_gpr() in DynASM.	2011-05-16 02:39:26 +02:00
Mike Pall	cfdc356ebe	RELEASE LuaJIT-2.0.0-beta7	2011-05-05 16:31:13 +02:00
Mike Pall	7ff8409797	DynASM: x86/x64: Fix vreg in opcode. x64: Fix imm "I" after abs addr.	2011-04-28 12:54:46 +02:00
Mike Pall	161bc379f0	ARM: Add GPR variants for shift aliases to DynASM.	2011-04-10 16:50:04 +02:00
Mike Pall	3f8fed5358	ARM: Add pc-relative loads to DynASM.	2011-04-08 02:44:21 +02:00
Mike Pall	33bab1f76c	ARM: Don't conditionalize non-opcodes in DynASM.	2011-04-04 01:39:19 +02:00
Mike Pall	2138df2662	ARM: Fix escaping of opcodes in DynASM.	2011-04-03 20:49:51 +02:00
Mike Pall	492efb7e7e	Clean up DynASM glue macros. Thanks to Josh Haberman.	2011-03-28 15:06:30 +02:00