104 Commits

Author	SHA1	Message	Date
Mike Pall	8d5ea4ceb9	Merge branch 'master' into v2.1	2023-12-10 16:13:34 +01:00
Mike Pall	10cc759f25	ARM: Fix stack restore for FP slots. ... Thanks to Peter Cawley. #1131	2023-12-10 16:10:48 +01:00
Mike Pall	07b3cd3cf9	Check for upvalue state transition in IR_UREFO. ... Thanks to Peter Cawley. #1085	2023-11-05 16:34:46 +01:00
Mike Pall	9cc8bbb7ae	ARM: Fix register hint for FFI calls with FP results.	2023-10-08 21:22:50 +02:00
Mike Pall	f442432ecb	Merge branch 'master' into v2.1	2023-09-09 18:18:48 +02:00
Mike Pall	44da356e97	ARM: Fix stack check code generation. ... Thanks to Peter Cawley. #1068	2023-09-09 18:16:31 +02:00
Mike Pall	ef587afb2c	Merge branch 'master' into v2.1	2023-08-20 21:33:37 +02:00
Mike Pall	158a284cc9	Bump copyright date.	2023-08-20 21:25:30 +02:00
Mike Pall	8635cbabf3	Merge branch 'master' into v2.1	2023-07-12 22:34:46 +02:00
Mike Pall	aa2db7ebd1	Fix base register coalescing in side trace. ... Thanks to Sergey Kaplun, NiLuJe and Peter Cawley. #1031 #1016	2023-07-12 21:56:17 +02:00
Mike Pall	de2e1ca9d3	Disable FMA by default. Use -Ofma or jit.opt.start("+fma") to enable. ... See the discussion in #918 for the rationale.	2022-12-07 18:38:22 +01:00
Mike Pall	1cdff194cf	Add missing check for LJ_KEYINDEX in ITERN recording. ... Reported by dragonorloong. Analyzed by vfprintf. #827	2022-04-02 21:27:43 +02:00
Mike Pall	7306ba78d6	Merge branch 'master' into v2.1	2022-01-15 19:42:30 +01:00
Mike Pall	c4dfb625ba	Bump copyright date.	2022-01-15 19:30:54 +01:00
Mike Pall	bb0f241015	Compile table traversals: next(), pairs(), BC_ISNEXT/BC_ITERN. ... Sponsored by OpenResty Inc.	2021-09-19 17:49:25 +02:00
Mike Pall	986bb406ad	Use IR_HIOP for generalized two-register returns. ... Sponsored by OpenResty Inc.	2021-09-19 17:47:11 +02:00
Mike Pall	9211f0b03b	Refactor IR_VLOAD to take an offset.	2021-09-19 17:18:16 +02:00
Mike Pall	f2d333c1ac	MIPS: Fix trace linking.	2021-09-19 16:09:48 +02:00
Mike Pall	02bcbea8b0	String buffers, part 3c: Add IRBUFHDR_WRITE mode. ... Sponsored by fmad.io.	2021-07-19 16:46:27 +02:00
Mike Pall	6df650fe3f	String buffers, part 3a: Add IR_TMPREF for passing TValues to helpers. ... Sponsored by fmad.io.	2021-07-19 16:23:12 +02:00
Mike Pall	1e66d0f9e6	Merge branch 'master' into v2.1	2021-01-02 21:56:07 +01:00
Mike Pall	f47c864b01	Bump copyright date.	2021-01-02 21:49:41 +01:00
Mike Pall	2e55a42c07	Merge branch 'master' into v2.1	2020-09-27 17:20:37 +02:00
Mike Pall	e8ec6fe996	Prevent patching of the GC exit check branch. ... Reported by Arseny Vakhrushev.	2020-09-27 16:44:13 +02:00
Mike Pall	ff34b48ddd	Redesign and harden string interning. ... Up to 40% faster on hash-intensive benchmarks. With some ideas from Sokolov Yura.	2020-06-23 03:06:45 +02:00
Mike Pall	d333b1a6fe	ARM: Implement FLOAD from GG_State.	2020-06-13 01:12:14 +02:00
Mike Pall	8ae5170cdc	Improve assertions.	2020-06-15 02:52:00 +02:00
Mike Pall	b2307c8ad8	Remove pow() splitting and cleanup backends.	2020-05-23 21:33:01 +02:00
Mike Pall	5655be4546	Cleanup math function compilation and fix inconsistencies.	2020-05-22 04:53:35 +02:00
Mike Pall	03208c8162	Fix math.min()/math.max() inconsistencies.	2020-05-22 03:10:30 +02:00
Mike Pall	87b111f0fe	Merge branch 'master' into v2.1	2020-01-20 23:34:21 +01:00
Mike Pall	38a5ed4b43	Bump copyright date.	2020-01-20 23:26:51 +01:00
Mike Pall	178512fab9	Merge branch 'master' into v2.1	2019-04-29 18:04:47 +02:00
Mike Pall	9bd5a722be	ARM: Fix GCC 7 -Wimplicit-fallthrough warnings.	2019-04-29 18:02:50 +02:00
Mike Pall	5802ab56b6	ARM: Fix condition code check fusion. ... Reported by Qingjun Wei.	2019-04-29 17:38:05 +02:00
Mike Pall	71ff7ef8a7	Merge branch 'master' into v2.1	2017-01-17 12:41:05 +01:00
Mike Pall	b93a1dd0c8	Bump copyright date to 2017.	2017-01-17 12:35:03 +01:00
Mike Pall	786dbb2ebd	Add IR_FLOAD with REF_NIL for field loads from GG_State. ... Contributed by Peter Cawley.	2016-05-21 01:00:49 +02:00
Mike Pall	475a6ae33f	Merge branch 'master' into v2.1	2016-05-20 20:26:39 +02:00
Mike Pall	37e1e70313	Add guard for obscure aliasing between open upvalues and SSA slots. ... Thanks to Peter Cawley.	2016-05-20 20:24:06 +02:00
Mike Pall	f4231949b5	Merge branch 'master' into v2.1	2016-03-03 12:11:37 +01:00
Mike Pall	db1b399af1	Bump copyright date to 2016.	2016-03-03 12:02:22 +01:00
Mike Pall	6cb38f788f	Merge branch 'master' into v2.1	2016-02-10 18:53:42 +01:00
Mike Pall	a443889677	Don't allocate unused 2nd result register in JIT compiler backend.	2016-02-10 18:51:02 +01:00
Mike Pall	825dcdc4d1	Generalize LJ_SOFTFP dependencies in lj_asm.c.	2016-02-09 17:29:23 +01:00
Mike Pall	0a5045c34e	Merge branch 'master' into v2.1	2015-01-06 00:12:45 +01:00
Mike Pall	86913b9bbf	Bump copyright date to 2015.	2015-01-05 23:59:31 +01:00
Mike Pall	054e6abe37	Add LJ_FR2 mode: Two-slot frame info.	2015-01-03 15:04:38 +01:00
Mike Pall	2863b10956	Merge branch 'master' into v2.1	2014-02-20 15:09:02 +01:00
Mike Pall	2bc63bb6af	Prevent BASE register coalescing if parent uses IR_RETF.	2014-02-19 17:09:22 +01:00