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212 Commits

Author SHA1 Message Date
Mike Pall
054e6abe37 Add LJ_FR2 mode: Two-slot frame info. 2015-01-03 15:04:38 +01:00
Mike Pall
82e6e5fb5f x86: Fix stack slot reservation for FP math functions. 
Followup fix for commit ad03eba7.
 2014-12-16 22:25:52 +01:00
Mike Pall
ad03eba715 x86/x64: Drop internal x87 math functions. Use libm functions. 2014-12-08 02:02:34 +01:00
Mike Pall
8cc89332ff Merge branch 'master' into v2.1 2014-11-28 20:21:35 +01:00
Mike Pall
c75c62b489 Fix snapshot #0 handling for traces with a stack check on entry. 2014-11-28 20:20:12 +01:00
Mike Pall
d2809bec24 Merge branch 'master' into v2.1 2014-10-08 22:06:23 +02:00
Mike Pall
6d0654d3ec Fix fused constant loads under high register pressure. 2014-10-08 22:04:51 +02:00
Mike Pall
0e9bf2f60d Merge branch 'master' into v2.1 2014-03-06 00:42:38 +01:00
Mike Pall
416abff90d Don't access dangling reference to reallocated IR. 2014-03-06 00:39:37 +01:00
Mike Pall
a9d4543601 Merge branch 'master' into v2.1 2014-01-16 23:18:34 +01:00
Mike Pall
ef59e54820 Bump copyright date to 2014. 2014-01-16 23:10:16 +01:00
Mike Pall
c1328e9795 x86: Fix stack slot counting for IR_CALLA (affects table.new). 2013-12-26 11:03:25 +01:00
Mike Pall
e6e760ca9f Compile getfenv(0). 2013-10-09 20:34:40 +02:00
Mike Pall
c8cfca0557 Add table.new(). 2013-10-09 17:02:01 +02:00
Mike Pall
d1194a82eb Low-overhead profiler, part 4: JIT compiler support. 2013-09-08 02:53:23 +02:00
Mike Pall
517500ba48 Save currently executing lua_State in g->cur_L. 
This is only a good approximation due to deficiencies in the design of
the Lua/C API. It indicates _some_ valid state that is/was executing.
Also reorder L->cframe stores to achieve a synchronously consistent state.
 2013-08-30 23:38:17 +02:00
Mike Pall
f1f7e40318 FFI: Compile VLA/VLS and large cdata allocs with default initialization. 2013-05-24 00:49:02 +02:00
Mike Pall
647cc4613f Merge branch 'master' into v2.1 2013-05-16 20:07:53 +02:00
Mike Pall
0f79d4741f Handle calls with max. args in backends even after SPLIT. 2013-05-16 19:59:38 +02:00
Mike Pall
acda75ad2c Refactor CCallInfo representation for split arguments. 2013-05-13 19:49:46 +02:00
Mike Pall
8f90a1279e Big renaming of string buffer/formatting/conversion functions. 2013-05-13 10:15:07 +02:00
Mike Pall
723574d08c Optimize BUFHDR code generation. 
Rematerialize const buffer pointer instead of spilling.
 2013-04-27 00:17:59 +02:00
Mike Pall
47fa9a8d8f Change semantics of buffer ops to simplify CSE and DCE. 2013-04-26 13:47:41 +02:00
Mike Pall
255326afb6 Use explicit conversion type for IR_TOSTR. Add char conversion. 2013-04-23 02:20:03 +02:00
Mike Pall
557391c3b7 Fuse string creation into concats. Optimize single-char concats. 2013-04-23 00:56:03 +02:00
Mike Pall
2cdf90f068 Always emit TOSTR for non-string CAT operands. Fuse in backend. 2013-04-23 00:10:01 +02:00
Mike Pall
a2c78810ca Combine IR instruction dispatch for all assembler backends. 2013-04-22 22:32:41 +02:00
Mike Pall
988e183965 Reorganize generic operations common to all assembler backends. 2013-04-22 17:34:36 +02:00
Mike Pall
5f1781a127 Compile string concatenations (BC_CAT). 2013-04-21 01:01:33 +02:00
Mike Pall
9ead735159 Add generic load/store with offset to assembler backends. 2013-04-21 00:58:32 +02:00
Mike Pall
ac14d88030 Merge branch 'master' into v2.1 2013-04-04 18:20:58 +02:00
Mike Pall
389822d606 Fix spurious red zone overflows in machine code generation. 2013-04-04 17:19:31 +02:00
Mike Pall
57768cd588 x86: Remove x87 support from interpreter. 
SSE2 required from now on.
 2013-02-21 16:56:59 +01:00
Mike Pall
4a44c4ff69 Bump copyright date to 2013. 2013-02-11 12:54:48 +01:00
Mike Pall
ae1987d535 Fix CONV.num.int sinking. 2012-11-06 16:57:50 +01:00
Mike Pall
b0dde5b2b1 FFI: Fix code generation for replay of sunk float fields. 2012-10-29 17:21:44 +01:00
Mike Pall
0ecdff43e8 x86: Fix register allocation for calls returning register pair. 2012-09-27 14:16:18 +02:00
Mike Pall
30f458fb4d ARM, PPC, MIPS: Improve XLOAD operand fusion and register hinting. 2012-08-27 20:25:54 +02:00
Mike Pall
cf3a263044 Fix compilation with FFI disabled. 2012-08-26 14:36:00 +02:00
Mike Pall
52ca2cc8ba ARM: Fix base register coalescing. 2012-08-25 18:38:30 +02:00
Mike Pall
1481263aaa ARM, MIPS, PPC: Rematerialize FPR invariants first. 2012-08-19 18:42:08 +02:00
Mike Pall
4dc9e22def ARM: Add VFP and hard-float ABI variants to JIT compiler. 2012-08-09 13:13:11 +02:00
Mike Pall
53e28d7678 Limit number of parent links handled by backend. 2012-07-11 16:48:52 +02:00
Mike Pall
24fa85760c Use an explicit flag to signal SINK tags for a trace. 2012-07-11 16:45:15 +02:00
Mike Pall
79ecb231ce Don't allocate constants for sunk stores. 2012-07-09 16:22:08 +02:00
Mike Pall
7c056488d9 Drop range limit for sunk stores relative to sunk allocation. 2012-07-04 21:16:06 +02:00
Mike Pall
80d0acc7c1 Fix compiler warnings. 2012-07-03 13:22:30 +02:00
Mike Pall
0af3f47ba0 Add allocation sinking and store sinking optimization. 2012-07-02 23:47:12 +02:00
Mike Pall
0688de5483 Add IR_PVAL instruction for non-slot parent links. 2012-07-02 22:47:20 +02:00
Mike Pall
5d0115ef8d Add explicit IR_GCSTEP instruction. 2012-07-02 22:42:40 +02:00