niravthakkar
6bbfa48b93
Updated the memory parsing
...
It accepts 2 registers, without the displacement
2017-01-04 16:20:56 +05:30
niravthakkar
b84dd8e65d
Added couple of instructions required by test-case
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maeb(RXF) and cegbra(RRF-e) have been added
2017-01-03 16:16:29 +05:30
niravthakkar
dd6ecfa73d
Added SIY addressing mode support
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Added SIY add mode, and Updated the number of parameters for few of the instructions of RS-a mode
2017-01-03 15:51:23 +05:30
Michael Munday
12602d2a1f
Fix for DynASM buffer overflow.
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Need to include all actions with arguments against MAXSECPOS.
2016-12-29 16:50:58 -05:00
Michael Munday
419869b20e
Fixes for DynASM.
...
* s/hle/nle/
* Fix RRF-b encoding (didbr instruction)
2016-12-20 14:53:31 -05:00
Michael Munday
5076a3ee2e
Fix some DynASM instructions.
2016-12-20 09:27:40 -05:00
niravthakkar
28b6fe8759
Updated encoding for instructions
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Have replaced the characters used for encoding with their respective addressing modes
2016-12-20 17:50:29 +05:30
Michael Munday
0d442ec688
Add some more instructions to DynASM.
2016-12-19 14:21:24 -05:00
Michael Munday
bee112d431
Add support for global short assignments.
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In other words 'a = 1' now works.
2016-12-16 17:23:46 -05:00
Michael Munday
f79a6f3f0b
Add support for clm instruction.
2016-12-14 21:16:30 -05:00
Michael Munday
ef3ff100f2
Fix decoding of REL_EXT.
...
REL_EXT has an argument which wasn't being properly jumped,
resulting in an early STOP (because the argument is 0).
2016-12-14 16:27:38 -05:00
niravthakkar
d63ff89c54
Added support for RRD addressing mode
...
We may not require RRD mode but, Added to check working of RRF-e.
2016-12-14 19:07:05 +05:30
niravthakkar
df7c3245e0
Minor Fix, correct the parameter used
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Instead of params[2] , params[1] was used, corrected it.
2016-12-14 17:45:32 +05:30
niravthakkar
52368ac005
Minor cleanup
2016-12-14 14:47:15 +05:30
niravthakkar
ccd2614902
Added support for RIE-e, RSI, RXF, SI instructions
2016-12-14 14:18:07 +05:30
niravthakkar
f01f459573
Added support for RIL-c and RX-b instructions
2016-12-14 13:51:58 +05:30
niravthakkar
a8244c02ec
Added support for RI-b and RI-c mode instructions
2016-12-14 13:41:55 +05:30
niravthakkar
cdb31062b7
Added the action part for I mode
2016-12-14 13:24:44 +05:30
niravthakkar
52ab0596da
Added support for I mode instructions
2016-12-14 13:16:44 +05:30
niravthakkar
bc490013a3
Adding S mode instructions support
2016-12-14 13:08:32 +05:30
niravthakkar
45669fecef
Added RRF-b mode support
2016-12-14 12:34:11 +05:30
niravthakkar
2f96ca3d91
Adding support for RXE mode instructions
2016-12-14 12:29:46 +05:30
niravthakkar
fc5874c951
Added RRF-e support
2016-12-14 12:22:08 +05:30
Michael Munday
c83f4af9cc
Add more RI-a (register-immediate) instructions.
2016-12-13 17:01:44 -05:00
Michael Munday
3ef1f21531
Add support for SIL instructions in DynASM.
2016-12-13 11:26:53 -05:00
Michael Munday
0b120ac64b
Add partial implementation of vm_cpcall.
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Currently works if the call returns 0. Haven't yet written the code
needed to handle the non-zero case.
2016-12-12 17:17:34 -05:00
Michael Munday
361a298371
Add lhi instruction and fix immediate parsing.
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We were reading immediate values as hexadecimal values, really we
want the default to be decimal unless the immediate has a '0x' prefix.
2016-12-12 14:38:55 -05:00
niravthakkar
9b9e1ea667
Added SS-b mode
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Currently I am not able to test the functionality of this mode, need some help in that.
Also for the time being I have created different function for parsing, we can merge that later, just to make sure SS-a doesnt break, I have not merged this since I was not able to test it.
Let me know your comments on this
2016-12-09 19:18:02 +05:30
Michael Munday
1a06b651e2
Fix a couple of templates that were too short.
2016-12-08 16:00:59 -05:00
Michael Munday
d472a3cc1c
Add support for .type directives.
2016-12-08 15:29:26 -05:00
Michael Munday
b98c92e142
Delete unused branch_type function.
2016-12-08 13:59:05 -05:00
Michael Munday
106718249e
Add support for SS-a instructions.
...
I've also changed the template parser so that it can handle suffixes
which are longer than 1 character. The suffix for SS-a instructions
is "SS-a". We could change this again later.
2016-12-07 16:56:00 -05:00
niravthakkar
127f0fd745
Adding RRD support
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Currently only "maer" is implemented. I am not able to get this working, don't know if I am missing out something, or we need to add some more functionality for RRD.
2016-12-07 20:21:06 +05:30
Michael Munday
cdfb632a4f
Add ADD HALFWORD IMMEDIATE (64-bit) instruction (aghi).
2016-12-06 15:39:04 -05:00
Michael Munday
c688a0a3ab
Add support for brasl instruction.
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Important for calling subroutines.
2016-12-06 14:38:11 -05:00
Michael Munday
3ae1c4fd6b
Support floating point register arguments.
...
It would be nice to verify that floating-point/general-purpose
registers are indeed expected by the instruction, but for now treat
them both the same so we can use floating-point instructions.
2016-12-06 13:15:29 -05:00
Michael Munday
e3ab67aed4
Support forward local branches.
2016-12-06 11:57:48 -05:00
niravthakkar
1362e9aee2
Minor Cleanup
2016-12-06 19:34:47 +05:30
niravthakkar
ba4343d9d1
Added support for Immediate mode 16 bit
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Currently only afi instruction is encoded, will be adding other instructions too. For encoding we are running out of characters so was planning to append the complete modes (RXa or rxa) which one do you think is better, and also thinking of just adding remaining instruction modes as well, which we don't support as of now. Let me know if you want me to add those, or we will wait for sometime before we add those.
2016-12-06 19:17:54 +05:30
niravthakkar
2156278508
Updated the addressing mode working
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The case where immediate was passed as label was not covered initially, so updated it
2016-12-06 12:23:51 +05:30
Michael Munday
73ad6dc77d
Add support for jumps to local labels.
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Currently limited to 16-bits ONLY.
Allows code like:
|1:
| ...
| j <1
2016-12-05 17:27:24 -05:00
Michael Munday
410bdb8182
Minor cleanup of dasm_s390x.lua.
2016-12-05 15:00:40 -05:00
Michael Munday
d9e61fe7a8
Shorten templates by four characters.
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We only have 6-byte instructions, so we don't really need the ability
to encode 8-bytes.
2016-12-05 14:23:35 -05:00
Michael Munday
d7f7509894
Minor indentation fixes.
2016-12-05 12:35:13 -05:00
niravthakkar
b97a7f7b44
Minor cleanup and modified 32 bit signed check
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Modified 32 bit signed check for the immediate value
2016-12-02 17:19:29 +05:30
niravthakkar
45553891da
Minor change , missed out brace
2016-12-02 14:13:55 +05:30
niravthakkar
4c7e494e0a
Added support for Immediate addressing mode
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Adding support for Immediate add mode, need to check how 32 bits is returned, currently followed the displacement method.
2016-12-02 12:55:43 +05:30
Michael Munday
1b7ded5474
Add support for RS-a and RSY-a instructions like stm and stmg.
2016-12-01 19:45:06 -05:00
Michael Munday
6ae327df75
Add support for RXY instructions (20-bit displacements).
2016-12-01 19:26:30 -05:00
Michael Munday
77f283c328
Allow symbols to be used for 12-bit displacements.
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The parse_mem_bx function now returns a function to call to add an
action to the action list to handle the evaluation of the
displacement. This allows us to delay adding said action until
after we have emitted the actions for the instruction encodings
themselves.
Code like this should now work:
int x = 24
| st r1, x(sp)
2016-12-01 17:09:45 -05:00
