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Author SHA1 Message Date
Alexey Kopytov
60a5e52bf7 Fixes #285: Increase available allocation range in mcode_alloc() 
Change mcode_alloc() so that instead of all execution threads using the
same allocation range of '[target - range/2; target + range / 2]' (where
'range' is the jump range defined by the architecture), make some
threads use the '[target - range; target]' range, and other ones use
'[target; target + range]' based on a PRNG. The patch essentially
doubles the available allocation pool for mcode_alloc() and helps reduce
mmap() scalability issues for multi-threaded applications.
 2017-02-25 17:57:38 +03:00
Alexey Kopytov
387d3abff4 Fixes #282: Incorrect range calculation in mcode_alloc() 
Since 'range' in mcode_alloc() is calculated based on
LJ_TARGET_JUMPRANGE-1, i.e. already half the available jump range, don't
divide it by 2 again for randomized allocations.

Also fix the number of bits argument to LJ_PRNG_BITS() to not generate
excessive bits on architectures with LJ_TARGET_JUMPRANGE < 31. That
wouldn't play well with the 0x78b constant being XORed with the
generated random number apparently to improve PRNG properties, so that
part has been removed. Improving PRNG will be addressed separately.
 2017-02-25 16:50:15 +03:00
Mike Pall
a25c0b99b8 MIPS64, part 2: Add MIPS64 hard-float JIT compiler backend. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
 2017-02-20 03:43:10 +01:00
Mike Pall
4416e885d2 Fix FOLD rules for math.abs() and FP negation. 
Broken since SIMD constants were switched to IR_FLOAD REF_NIL.
 2017-02-20 02:51:31 +01:00
Mike Pall
019fb9d1e9 Fix soft-float math.abs() and negation. 
Broken since SIMD constants were switched to IR_FLOAD REF_NIL.
 2017-02-20 02:51:05 +01:00
Mike Pall
130d1dc5f2 x64/LJ_GC64: Fix warning for DUALNUM build. 2017-02-20 02:44:29 +01:00
Mike Pall
f640ec713a x64/LJ_GC64: Fix (currently unused) integer stores in asm_tvptr(). 2017-02-20 02:42:54 +01:00
Mike Pall
0a46ef1ac6 ARM64: Cleanup and de-cargo-cult TValue store generation. 2017-02-20 02:41:35 +01:00
Mike Pall
d0759e41a1 Merge branch 'master' into v2.1 2017-02-20 02:39:57 +01:00
Mike Pall
892d370edd MIPS: Don't use RID_GP as a scratch register. 2017-02-20 02:35:24 +01:00
Mike Pall
ee33a1f9b3 MIPS: Fix emitted code for U32 to float conversion. 2017-02-20 02:35:00 +01:00
Mike Pall
1abd779907 MIPS: Backport workaround for compact unwind tables. 2017-02-20 02:29:42 +01:00
Mike Pall
6bf3e4d6e6 Make checkptrGC() actually work. 
Neither LJ_64 nor LJ_GC64 are defined when lj_def.h is included.
So we'll need to use lazy C macro evaluation.
 2017-02-20 00:13:09 +01:00
Mike Pall
5aa0201374 ARM64: Fix AREF/HREF/UREF fusion. 
Thanks to Zhongwei Yao.
 2017-02-16 20:41:46 +01:00
Mike Pall
bd7e42e574 Fix extension docs about package.searchers. 2017-01-18 01:45:47 +01:00
Mike Pall
71ff7ef8a7 Merge branch 'master' into v2.1 2017-01-17 12:41:05 +01:00
Mike Pall
b93a1dd0c8 Bump copyright date to 2017. 2017-01-17 12:35:03 +01:00
Mike Pall
c94b921f92 LJ_GC64: Add build options and install instructions. 2017-01-17 12:21:12 +01:00
Mike Pall
c198167690 Add some more extensions from Lua 5.2/5.3. 
Contributed by François Perrad.
 2017-01-17 11:37:28 +01:00
Mike Pall
ed4ce98ac1 Merge branch 'master' into v2.1 2017-01-17 10:55:41 +01:00
Mike Pall
a1e13fa6e4 Fix HTML formatting. 2017-01-17 10:55:31 +01:00
Mike Pall
12c0df4189 Merge branch 'master' into v2.1 2017-01-17 10:47:42 +01:00
Mike Pall
a2013dd39a Fix cross-endian jit.bcsave for MIPS target. 2017-01-17 10:46:45 +01:00
Mike Pall
8e5d7bec0d ARM64: Remove unused variables in disassembler. 
Thanks to François Perrad.
 2016-12-30 17:54:10 +01:00
Mike Pall
ebec2530be ARM64: Fuse BOR/BXOR and BNOT into ORN/EON. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
 2016-12-15 22:47:40 +01:00
Mike Pall
3cfa9cb2bb Merge branch 'master' into v2.1 2016-12-15 22:46:26 +01:00
Mike Pall
fb61f7cbe3 Add "proto" field to jit.util.funcinfo(). 
Backport.
 2016-12-15 22:45:28 +01:00
Mike Pall
1973807480 Add "proto" field to jit.util.funcinfo(). 2016-12-13 21:30:13 +01:00
Mike Pall
4ccd876a65 ARM64: Use the correct FUSE check. 
Oops, my bad.
 2016-12-09 18:24:48 +01:00
Mike Pall
44b99ff14d ARM64: Fuse BOR(BSHL, BSHR) into EXTR/ROR. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
 2016-12-09 18:16:12 +01:00
Mike Pall
ec2756ba78 Add missing FOLD rule for 64 bit shift+BAND simplification. 2016-12-08 22:38:35 +01:00
Mike Pall
986854cbb2 ARM64: Fix code generation for S19 offsets. 
Contributed by Zhongwei Yao.
 2016-12-08 05:53:36 +01:00
Mike Pall
3975b6c9f4 ARM64: Fuse various BAND/BSHL/BSHR/BSAR combinations. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
 2016-12-08 04:09:29 +01:00
Mike Pall
2772cbc36e ARM64: Fuse FP multiply-add/sub. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
 2016-12-08 01:38:09 +01:00
Mike Pall
bfeb1167cd ARM64: Fuse XLOAD/XSTORE with STRREF/ADD/BSHL/CONV. 2016-12-07 18:40:31 +01:00
Mike Pall
2ac2cd4699 ARM64: Reorganize operand extension definitions. 2016-12-07 18:38:32 +01:00
Mike Pall
48b00297b3 ARM64: Add missing ldrb/strb instructions to disassembler. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
 2016-12-07 18:34:10 +01:00
Mike Pall
22511fbe2b ARM64: Fix pc-relative loads of consts. Cleanup branch codegen. 
Thanks to Zhongwei Yao.
 2016-12-07 09:42:43 +01:00
Mike Pall
3ad2bbf586 ARM64: Make use of tbz/tbnz and cbz/cbnz. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
 2016-11-29 19:30:40 +01:00
Mike Pall
6538c8a187 Document 47 bit limit for lightuserdata. 2016-11-25 09:23:08 +01:00
Mike Pall
d7243e1de0 Eliminate use of lightuserdata derived from static data pointers. 
Required for >47 bit VA, e.g. ARM64.
 2016-11-24 19:14:17 +01:00
Mike Pall
81259898ea ARM64: Emit more efficient trace exits. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
 2016-11-24 18:56:19 +01:00
Mike Pall
1131fa22a2 Merge branch 'master' into v2.1 2016-11-21 16:02:41 +01:00
Mike Pall
c3cae04153 Update contact info. 2016-11-21 16:02:10 +01:00
Mike Pall
a56654460d Generalize deferred constant handling in backend to 64 bit. 2016-11-21 15:43:17 +01:00
Mike Pall
2b77da35bc ARM64: Reject special case in emit_isk13(). 2016-11-20 23:32:17 +01:00
Mike Pall
7a0c3a1127 ARM64: Allow full VA range for mcode allocation. 2016-11-20 23:17:45 +01:00
Mike Pall
04b60707d7 ARM64: Add JIT compiler backend. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
 2016-11-20 22:18:14 +01:00
Mike Pall
13642b75ac Whitespace. 2016-11-20 22:14:09 +01:00
Mike Pall
202713a638 Fix amalgamated build. 2016-11-19 20:53:31 +01:00