Commit Graph

55 Commits

Author SHA1 Message Date
Mike Pall
5655be4546 Cleanup math function compilation and fix inconsistencies. 2020-05-22 04:53:35 +02:00
Mike Pall
03208c8162 Fix math.min()/math.max() inconsistencies. 2020-05-22 03:10:30 +02:00
Mike Pall
87b111f0fe Merge branch 'master' into v2.1 2020-01-20 23:34:21 +01:00
Mike Pall
38a5ed4b43 Bump copyright date. 2020-01-20 23:26:51 +01:00
Mike Pall
71b7bc8834 PPC: Add soft-float support to JIT compiler backend.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
2017-09-03 23:20:53 +02:00
Mike Pall
71ff7ef8a7 Merge branch 'master' into v2.1 2017-01-17 12:41:05 +01:00
Mike Pall
b93a1dd0c8 Bump copyright date to 2017. 2017-01-17 12:35:03 +01:00
Mike Pall
e577db52c5 Increase range of GG_State loads via IR_FLOAD with REF_NIL.
Require 32 bit alignment and store offset/4 instead.
Otherwise this can overflow the 10 bit limit for the FOLD op2 key.
2016-11-19 19:53:46 +01:00
Mike Pall
786dbb2ebd Add IR_FLOAD with REF_NIL for field loads from GG_State.
Contributed by Peter Cawley.
2016-05-21 01:00:49 +02:00
Mike Pall
cfa188f134 Move common 32/64 bit in-memory FP constants to jit_State.
Prerequisite for immovable IR.
Contributed by Peter Cawley.
2016-05-21 00:02:45 +02:00
Mike Pall
475a6ae33f Merge branch 'master' into v2.1 2016-05-20 20:26:39 +02:00
Mike Pall
37e1e70313 Add guard for obscure aliasing between open upvalues and SSA slots.
Thanks to Peter Cawley.
2016-05-20 20:24:06 +02:00
Mike Pall
f4231949b5 Merge branch 'master' into v2.1 2016-03-03 12:11:37 +01:00
Mike Pall
db1b399af1 Bump copyright date to 2016. 2016-03-03 12:02:22 +01:00
Mike Pall
6cb38f788f Merge branch 'master' into v2.1 2016-02-10 18:53:42 +01:00
Mike Pall
a443889677 Don't allocate unused 2nd result register in JIT compiler backend. 2016-02-10 18:51:02 +01:00
Mike Pall
361827c8f9 PPC64: Add build infrastructure. 2015-03-06 03:47:45 +01:00
Mike Pall
0a5045c34e Merge branch 'master' into v2.1 2015-01-06 00:12:45 +01:00
Mike Pall
86913b9bbf Bump copyright date to 2015. 2015-01-05 23:59:31 +01:00
Mike Pall
054e6abe37 Add LJ_FR2 mode: Two-slot frame info. 2015-01-03 15:04:38 +01:00
Mike Pall
7400e2c0cc Merge branch 'master' into v2.1 2014-05-27 15:59:20 +02:00
Mike Pall
49d3157e14 PPC: Fix red zone overflow in machine code generation. 2014-05-27 15:58:04 +02:00
Mike Pall
2863b10956 Merge branch 'master' into v2.1 2014-02-20 15:09:02 +01:00
Mike Pall
2bc63bb6af Prevent BASE register coalescing if parent uses IR_RETF. 2014-02-19 17:09:22 +01:00
Mike Pall
a9d4543601 Merge branch 'master' into v2.1 2014-01-16 23:18:34 +01:00
Mike Pall
ef59e54820 Bump copyright date to 2014. 2014-01-16 23:10:16 +01:00
Mike Pall
d1194a82eb Low-overhead profiler, part 4: JIT compiler support. 2013-09-08 02:53:23 +02:00
Mike Pall
517500ba48 Save currently executing lua_State in g->cur_L.
This is only a good approximation due to deficiencies in the design of
the Lua/C API. It indicates _some_ valid state that is/was executing.
Also reorder L->cframe stores to achieve a synchronously consistent state.
2013-08-30 23:38:17 +02:00
Mike Pall
f1f7e40318 FFI: Compile VLA/VLS and large cdata allocs with default initialization. 2013-05-24 00:49:02 +02:00
Mike Pall
647cc4613f Merge branch 'master' into v2.1 2013-05-16 20:07:53 +02:00
Mike Pall
0f79d4741f Handle calls with max. args in backends even after SPLIT. 2013-05-16 19:59:38 +02:00
Mike Pall
acda75ad2c Refactor CCallInfo representation for split arguments. 2013-05-13 19:49:46 +02:00
Mike Pall
a2c78810ca Combine IR instruction dispatch for all assembler backends. 2013-04-22 22:32:41 +02:00
Mike Pall
988e183965 Reorganize generic operations common to all assembler backends. 2013-04-22 17:34:36 +02:00
Mike Pall
5f1781a127 Compile string concatenations (BC_CAT). 2013-04-21 01:01:33 +02:00
Mike Pall
389822d606 Fix spurious red zone overflows in machine code generation. 2013-04-04 17:19:31 +02:00
Mike Pall
4a44c4ff69 Bump copyright date to 2013. 2013-02-11 12:54:48 +01:00
Mike Pall
a58b86dad3 PPC: Compile math.sqrt() to fsqrt instruction. 2012-10-15 21:23:20 +02:00
Mike Pall
30f458fb4d ARM, PPC, MIPS: Improve XLOAD operand fusion and register hinting. 2012-08-27 20:25:54 +02:00
Mike Pall
4c882fe714 Replace strtod() with builtin string to number conversion. 2012-08-25 23:02:29 +02:00
Mike Pall
4da7ffc34b Remove unneeded snapshot preps for sunk stores. 2012-07-03 23:19:45 +02:00
Mike Pall
17d3fc47f3 Avoid pesky compiler warnings about C++ keywords (eh?). 2012-07-03 13:19:32 +02:00
Mike Pall
0af3f47ba0 Add allocation sinking and store sinking optimization. 2012-07-02 23:47:12 +02:00
Mike Pall
5d0115ef8d Add explicit IR_GCSTEP instruction. 2012-07-02 22:42:40 +02:00
Mike Pall
264177b0d0 Use HIOP for XSTORE in SPLIT pass. 2012-07-02 22:37:00 +02:00
Mike Pall
a53a549774 PPC: Fix HREFK code generation for huge tables. 2012-03-29 01:11:23 +02:00
Mike Pall
509ca0f0db PPC: Fix fusion of floating-point XLOAD/XSTORE. 2012-03-29 01:10:35 +02:00
Mike Pall
10ef109eef Bump copyright date to 2012. 2012-01-23 22:42:42 +01:00
Mike Pall
a064156d5d PPC: Avoid undefined operand dereference in BAND/shift fusion. 2011-12-13 18:05:51 +01:00
Mike Pall
10474987bd Move helper for syncing data/instruction cache to lj_mcode.c.
Sync caches after dynamic code generation for FFI callbacks.
2011-12-12 23:10:46 +01:00