Mike Pall
|
fddc9650d8
|
Merge branch 'master' into v2.1
|
2024-08-19 16:22:55 +02:00 |
|
Mike Pall
|
bcc6cbb188
|
MIPS32: Fix little-endian IR_RETF.
Thanks to Peter Cawley. #1250
|
2024-08-19 16:17:44 +02:00 |
|
Mike Pall
|
2f35cb45fd
|
MIPS64 R2/R6: Fix FP to integer conversions.
Thanks to Peter Cawley. #1146
|
2024-01-22 19:12:13 +01:00 |
|
Mike Pall
|
07b3cd3cf9
|
Check for upvalue state transition in IR_UREFO.
Thanks to Peter Cawley. #1085
|
2023-11-05 16:34:46 +01:00 |
|
Mike Pall
|
ef587afb2c
|
Merge branch 'master' into v2.1
|
2023-08-20 21:33:37 +02:00 |
|
Mike Pall
|
158a284cc9
|
Bump copyright date.
|
2023-08-20 21:25:30 +02:00 |
|
Mike Pall
|
72efc42ef2
|
MIPS: Fix "bad FP FLOAD" assertion.
Reported by Sergey Kaplun. #1043
|
2023-08-13 03:02:25 +02:00 |
|
Mike Pall
|
8635cbabf3
|
Merge branch 'master' into v2.1
|
2023-07-12 22:34:46 +02:00 |
|
Mike Pall
|
aa2db7ebd1
|
Fix base register coalescing in side trace.
Thanks to Sergey Kaplun, NiLuJe and Peter Cawley. #1031 #1016
|
2023-07-12 21:56:17 +02:00 |
|
Mike Pall
|
a04480e311
|
Merge branch 'master' into v2.1
|
2022-12-22 00:52:04 +01:00 |
|
Mike Pall
|
8a5e398c52
|
Avoid negation of signed integers in C that may hold INT*_MIN.
Reported by minoki.
Recent C compilers 'take advantage' of the undefined behavior.
This completely changes the meaning of expressions like (k == -k).
|
2022-12-22 00:03:06 +01:00 |
|
Mike Pall
|
1cdff194cf
|
Add missing check for LJ_KEYINDEX in ITERN recording.
Reported by dragonorloong. Analyzed by vfprintf. #827
|
2022-04-02 21:27:43 +02:00 |
|
Mike Pall
|
7306ba78d6
|
Merge branch 'master' into v2.1
|
2022-01-15 19:42:30 +01:00 |
|
Mike Pall
|
c4dfb625ba
|
Bump copyright date.
|
2022-01-15 19:30:54 +01:00 |
|
Mike Pall
|
4a70bd71ac
|
MIPS64: Fix soft-float IR_TOSTR.
|
2021-10-02 17:48:19 +02:00 |
|
Mike Pall
|
10c9d9a214
|
Merge branch 'master' into v2.1
|
2021-10-02 17:23:51 +02:00 |
|
Mike Pall
|
d3294fa63b
|
MIPS: Fix register allocation in assembly of HREF.
Reported by Jakub Piotr Cłapa.
|
2021-10-02 16:52:57 +02:00 |
|
Mike Pall
|
bb0f241015
|
Compile table traversals: next(), pairs(), BC_ISNEXT/BC_ITERN.
Sponsored by OpenResty Inc.
|
2021-09-19 17:49:25 +02:00 |
|
Mike Pall
|
986bb406ad
|
Use IR_HIOP for generalized two-register returns.
Sponsored by OpenResty Inc.
|
2021-09-19 17:47:11 +02:00 |
|
Mike Pall
|
9211f0b03b
|
Refactor IR_VLOAD to take an offset.
|
2021-09-19 17:18:16 +02:00 |
|
Mike Pall
|
f2d333c1ac
|
MIPS: Fix trace linking.
|
2021-09-19 16:09:48 +02:00 |
|
Mike Pall
|
02bcbea8b0
|
String buffers, part 3c: Add IRBUFHDR_WRITE mode.
Sponsored by fmad.io.
|
2021-07-19 16:46:27 +02:00 |
|
Mike Pall
|
6df650fe3f
|
String buffers, part 3a: Add IR_TMPREF for passing TValues to helpers.
Sponsored by fmad.io.
|
2021-07-19 16:23:12 +02:00 |
|
Mike Pall
|
71db0cf043
|
Add IRCONV_NONE for pass-through INT to I64/U64 type change.
|
2021-07-19 16:11:39 +02:00 |
|
Mike Pall
|
dbb7863016
|
MIPS: Fix handling of long-range spare jumps.
|
2021-03-23 00:26:08 +01:00 |
|
Mike Pall
|
1e66d0f9e6
|
Merge branch 'master' into v2.1
|
2021-01-02 21:56:07 +01:00 |
|
Mike Pall
|
f47c864b01
|
Bump copyright date.
|
2021-01-02 21:49:41 +01:00 |
|
Mike Pall
|
2e55a42c07
|
Merge branch 'master' into v2.1
|
2020-09-27 17:20:37 +02:00 |
|
Mike Pall
|
e8ec6fe996
|
Prevent patching of the GC exit check branch.
Reported by Arseny Vakhrushev.
|
2020-09-27 16:44:13 +02:00 |
|
Mike Pall
|
ff34b48ddd
|
Redesign and harden string interning.
Up to 40% faster on hash-intensive benchmarks.
With some ideas from Sokolov Yura.
|
2020-06-23 03:06:45 +02:00 |
|
Mike Pall
|
8ae5170cdc
|
Improve assertions.
|
2020-06-15 02:52:00 +02:00 |
|
Mike Pall
|
b2307c8ad8
|
Remove pow() splitting and cleanup backends.
|
2020-05-23 21:33:01 +02:00 |
|
Mike Pall
|
5655be4546
|
Cleanup math function compilation and fix inconsistencies.
|
2020-05-22 04:53:35 +02:00 |
|
Mike Pall
|
03208c8162
|
Fix math.min()/math.max() inconsistencies.
|
2020-05-22 03:10:30 +02:00 |
|
Mike Pall
|
87b111f0fe
|
Merge branch 'master' into v2.1
|
2020-01-20 23:34:21 +01:00 |
|
Mike Pall
|
38a5ed4b43
|
Bump copyright date.
|
2020-01-20 23:26:51 +01:00 |
|
Mike Pall
|
94d0b53004
|
MIPS: Add MIPS64 R6 port.
Contributed by Hua Zhang, YunQiang Su from Wave Computing,
and Radovan Birdic from RT-RK.
Sponsored by Wave Computing.
|
2020-01-20 22:15:45 +01:00 |
|
Mike Pall
|
99cdfbf6a1
|
MIPS64: Fix register allocation in assembly of HREF.
Contributed by James Cowgill.
|
2017-11-08 12:54:03 +01:00 |
|
Mike Pall
|
a057a07ab7
|
MIPS64: Add soft-float support to JIT compiler backend.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
|
2017-06-07 23:56:54 +02:00 |
|
Mike Pall
|
0e4a551809
|
Merge branch 'master' into v2.1
|
2017-06-07 19:39:41 +02:00 |
|
Mike Pall
|
c7c3c4da43
|
MIPS: Fix handling of spare long-range jump slots.
Contributed by Djordje Kovacevic and Stefan Pejic.
|
2017-06-07 19:36:46 +02:00 |
|
Mike Pall
|
79fe5782f8
|
Merge branch 'master' into v2.1
|
2017-06-07 19:17:47 +02:00 |
|
Mike Pall
|
7381b62035
|
MIPS: Use precise search for exit jump patching.
Contributed by Djordje Kovacevic and Stefan Pejic.
|
2017-06-07 19:16:22 +02:00 |
|
Mike Pall
|
a25c0b99b8
|
MIPS64, part 2: Add MIPS64 hard-float JIT compiler backend.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
|
2017-02-20 03:43:10 +01:00 |
|
Mike Pall
|
d0759e41a1
|
Merge branch 'master' into v2.1
|
2017-02-20 02:39:57 +01:00 |
|
Mike Pall
|
ee33a1f9b3
|
MIPS: Fix emitted code for U32 to float conversion.
|
2017-02-20 02:35:00 +01:00 |
|
Mike Pall
|
71ff7ef8a7
|
Merge branch 'master' into v2.1
|
2017-01-17 12:41:05 +01:00 |
|
Mike Pall
|
b93a1dd0c8
|
Bump copyright date to 2017.
|
2017-01-17 12:35:03 +01:00 |
|
Mike Pall
|
e577db52c5
|
Increase range of GG_State loads via IR_FLOAD with REF_NIL.
Require 32 bit alignment and store offset/4 instead.
Otherwise this can overflow the 10 bit limit for the FOLD op2 key.
|
2016-11-19 19:53:46 +01:00 |
|
Mike Pall
|
d9986fbadb
|
MIPS64, part 1: Add MIPS64 support to interpreter.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
|
2016-05-28 05:10:55 +02:00 |
|