8 Commits

Author	SHA1	Message	Date
fsfod	275d0dcdd7	Treat IR_INTRN as potential load with respect to DSE	2019-12-08 21:36:38 +00:00
fsfod	f7331e9464	Added JIT support for intrinsics. Support for vector registers is NYI.	2019-12-08 21:36:38 +00:00
fsfod	57ff67552a	Added support for 4 byte opcode intrinsics	2019-12-08 21:36:38 +00:00
fsfod	de4c0b6ea5	Implement support for opcodes with dynamic registers	2019-12-08 21:36:38 +00:00
fsfod	e6fecee925	Added support for casting vectors to a pointer when using lj_cconv_ct_tv by using a special cast flag(CCF_INTRINS_ARG) for intrinsic vector arguments	2019-12-08 21:36:37 +00:00
fsfod	f21526df9b	Added support for ymm registers in intrinsics	2019-12-08 21:36:37 +00:00
fsfod	e1a1721ae2	Template intrinsics user machine code	2019-12-08 21:36:37 +00:00
fsfod	c84b176062	Initial support for intrinsics on x86/x64 interpreter only	2019-12-08 21:36:37 +00:00