Mike Pall
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87b111f0fe
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Merge branch 'master' into v2.1
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2020-01-20 23:34:21 +01:00 |
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Mike Pall
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94d0b53004
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MIPS: Add MIPS64 R6 port.
Contributed by Hua Zhang, YunQiang Su from Wave Computing,
and Radovan Birdic from RT-RK.
Sponsored by Wave Computing.
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2020-01-20 22:15:45 +01:00 |
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Mike Pall
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9c1b637898
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MIPS/MIPS64: Fix TSETR barrier (again).
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2018-10-14 15:12:59 +02:00 |
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Mike Pall
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8071aa4ad6
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MIPS64: Fix soft-float +-0.0 vs. +-0.0 comparison.
Thanks to Stefan Pejic.
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2018-01-29 12:12:29 +01:00 |
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Mike Pall
|
ea7071d3c3
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MIPS64: Fix xpcall() error case.
Thanks to François Perrad and Stefan Pejic.
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2017-11-18 12:25:35 +01:00 |
|
Mike Pall
|
a057a07ab7
|
MIPS64: Add soft-float support to JIT compiler backend.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
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2017-06-07 23:56:54 +02:00 |
|
Mike Pall
|
ed54eace64
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MIPS64: Fix stores of MULTRES.
Contributed by Stefan Pejic.
|
2017-04-17 12:04:08 +02:00 |
|
Mike Pall
|
58aaac3c64
|
MIPS64: Fix write barrier in BC_USETV.
Contributed by Stefan Pejic.
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2017-04-17 12:02:33 +02:00 |
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Mike Pall
|
a25c0b99b8
|
MIPS64, part 2: Add MIPS64 hard-float JIT compiler backend.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
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2017-02-20 03:43:10 +01:00 |
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Mike Pall
|
71ff7ef8a7
|
Merge branch 'master' into v2.1
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2017-01-17 12:41:05 +01:00 |
|
Mike Pall
|
d9986fbadb
|
MIPS64, part 1: Add MIPS64 support to interpreter.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
|
2016-05-28 05:10:55 +02:00 |
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