Mike Pall
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0bf46e1edf
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Merge branch 'master' into v2.1
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2018-01-29 13:19:30 +01:00 |
|
Mike Pall
|
d4ee803427
|
Fix GCC 7 -Wimplicit-fallthrough warnings.
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2018-01-29 13:06:13 +01:00 |
|
Mike Pall
|
6a2d8b0b4d
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Merge branch 'master' into v2.1
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2017-09-20 19:42:34 +02:00 |
|
Mike Pall
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0c0e7b168e
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DynASM/x86: Fix potential REL_A overflow.
Thanks to Joshua Haberman.
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2017-09-20 19:39:50 +02:00 |
|
Mike Pall
|
a9740d9edb
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DynASM: Fix warning.
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2017-03-08 21:59:14 +01:00 |
|
Mike Pall
|
71ff7ef8a7
|
Merge branch 'master' into v2.1
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2017-01-17 12:41:05 +01:00 |
|
Mike Pall
|
b93a1dd0c8
|
Bump copyright date to 2017.
|
2017-01-17 12:35:03 +01:00 |
|
Mike Pall
|
e3c4c9af0f
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DynASM/MIPS: Add missing MIPS64 instructions.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
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2016-05-28 05:09:24 +02:00 |
|
Mike Pall
|
75d046dbdd
|
DynASM/x86: Add ADX instructions.
Thanks to Peter Cawley.
|
2016-03-06 12:25:03 +01:00 |
|
Mike Pall
|
f4231949b5
|
Merge branch 'master' into v2.1
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2016-03-03 12:11:37 +01:00 |
|
Mike Pall
|
db1b399af1
|
Bump copyright date to 2016.
|
2016-03-03 12:02:22 +01:00 |
|
Mike Pall
|
22e7b00ddb
|
DynASM/x64: Fix for full VREG support.
Thanks to Peter Cawley.
|
2015-12-28 17:06:48 +01:00 |
|
Mike Pall
|
cfae3846f8
|
DynASM/x86: Add AVX AES instructions.
Contributed by Peter Cawley.
|
2015-12-28 16:40:39 +01:00 |
|
Mike Pall
|
a687a60eaa
|
DynASM/x64: Add full VREG support.
Contributed by Peter Cawley.
|
2015-12-28 13:44:13 +01:00 |
|
Mike Pall
|
0aa337a41c
|
Merge branch 'master' into v2.1
|
2015-11-04 14:09:59 +01:00 |
|
Mike Pall
|
367cba29ea
|
DynASM/x86: Add rdpmc instruction.
Thanks to Cosmin Apreutesei.
|
2015-11-04 14:04:19 +01:00 |
|
Mike Pall
|
4c08158be4
|
Whitespace.
|
2015-10-24 18:53:37 +02:00 |
|
Mike Pall
|
d62dc01984
|
DynASM: Bump version to 1.4.
Thanks to Peter Cawley.
|
2015-10-24 18:46:45 +02:00 |
|
Mike Pall
|
8a13c9cebf
|
DynASM/x86: Add AVX and AVX2 opcodes.
Thanks to Peter Cawley.
|
2015-10-24 18:43:47 +02:00 |
|
Mike Pall
|
7e22082480
|
DynASM/x86: Add AES-NI opcodes.
Thanks to Peter Cawley.
|
2015-10-24 18:18:52 +02:00 |
|
Mike Pall
|
e54ca424b5
|
Merge branch 'master' into v2.1
|
2015-10-24 18:18:07 +02:00 |
|
Mike Pall
|
7579b161af
|
DynASM/x86: Restrict shld/shrd to operands with same width.
Thanks to Peter Cawley.
|
2015-10-24 18:15:44 +02:00 |
|
Mike Pall
|
9dc785e0af
|
DynASM/x86: Fix some SSE instruction templates.
Thanks to Peter Cawley.
|
2015-10-24 18:12:40 +02:00 |
|
Mike Pall
|
1c968d5b63
|
DynASM/PPC: Add sub/shift/rotate/clear instruction aliases.
|
2015-04-12 03:46:16 +02:00 |
|
Mike Pall
|
b2a5cc8233
|
DynASM/PPC: Add support for parameterized shifts/masks.
|
2015-04-12 01:25:14 +02:00 |
|
Mike Pall
|
3e1703895a
|
DynASM/PPC: Add missing PPC64 instructions and various extensions.
Contributed by Caio Souza Oliveira.
|
2015-01-14 21:40:24 +01:00 |
|
Mike Pall
|
1b1bd08d3c
|
DynASM/ARM64: Fix checks for scaled immediates.
|
2015-01-07 13:17:11 +01:00 |
|
Mike Pall
|
0a5045c34e
|
Merge branch 'master' into v2.1
|
2015-01-06 00:12:45 +01:00 |
|
Mike Pall
|
86913b9bbf
|
Bump copyright date to 2015.
|
2015-01-05 23:59:31 +01:00 |
|
Mike Pall
|
a13dfd66c3
|
DynASM/ARM64: Various fixes.
|
2014-12-27 06:13:48 +01:00 |
|
Mike Pall
|
7a76d435da
|
Merge branch 'master' into v2.1
|
2014-12-27 06:11:14 +01:00 |
|
Mike Pall
|
db7cb5ab0e
|
DynASM/ARM: Fix rollback for variant templates.
|
2014-12-27 06:08:36 +01:00 |
|
Mike Pall
|
f49c61a277
|
DynASM/ARM64: Initial commit of ARM64 module.
|
2014-12-03 14:12:02 +01:00 |
|
Mike Pall
|
3f2e4ec699
|
DynASM/ARM: Fix description shown for multi-element templates.
|
2014-12-03 14:09:17 +01:00 |
|
Mike Pall
|
cb886b5817
|
DynASM/x86: Add fldenv, f[n]stenv, fxsave, fxrstor opcodes.
Thanks to Cosmin Apreutesei.
|
2014-09-22 13:44:28 +02:00 |
|
Mike Pall
|
ae7d4d5ad6
|
DynASM/x86: Add shld/shrd opcodes.
Thanks to Peter Cawley.
|
2014-09-21 18:03:47 +02:00 |
|
Mike Pall
|
80efb07750
|
DynASM: Emit version check after .arch directive.
|
2014-03-06 17:54:48 +01:00 |
|
Mike Pall
|
ef59e54820
|
Bump copyright date to 2014.
|
2014-01-16 23:10:16 +01:00 |
|
Mike Pall
|
1f7b326217
|
DynASM: Emit #line <n> <file> instead of #<n> <file>.
|
2013-09-12 12:46:28 +02:00 |
|
Mike Pall
|
ec96d8b494
|
DynASM/x64: Add VREG support to mov64.
Thanks to Peter Cawley.
|
2013-07-18 08:51:32 +02:00 |
|
Mike Pall
|
b2a13ddd74
|
DynASM/x86: Add lock prefix.
|
2013-06-24 12:20:25 +02:00 |
|
Mike Pall
|
d147eedac9
|
DynASM: Improve validation of local backwards relocations.
|
2013-03-17 14:20:40 +01:00 |
|
Mike Pall
|
4a44c4ff69
|
Bump copyright date to 2013.
|
2013-02-11 12:54:48 +01:00 |
|
Mike Pall
|
894d2d6ef4
|
DynASM/ARM: Fix conditional VFP instruction encoding.
|
2012-10-15 16:52:18 +02:00 |
|
Mike Pall
|
2d58872cb5
|
DynASM/ARM: Add VFP instructions.
|
2012-07-29 12:16:33 +02:00 |
|
Mike Pall
|
c00ffcb870
|
Change DynASM bit operations to use Lua BitOp.
|
2012-07-08 16:27:18 +02:00 |
|
Mike Pall
|
6b605bd455
|
DynASM/PPC: Add missing 64 bit rotates and mtocrf/mfocrf.
|
2012-06-12 16:47:25 +02:00 |
|
Mike Pall
|
6c8aaef2bb
|
DynASM: Compatibility with minilua.
|
2012-06-09 14:42:03 +02:00 |
|
Mike Pall
|
6c05739684
|
DynASM: Lua 5.2 compatibility fixes.
|
2012-02-17 11:40:18 +01:00 |
|
Mike Pall
|
10ef109eef
|
Bump copyright date to 2012.
|
2012-01-23 22:42:42 +01:00 |
|