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65 Commits

Author SHA1 Message Date
Mike Pall
ff34b48ddd Redesign and harden string interning. 
Up to 40% faster on hash-intensive benchmarks.
With some ideas from Sokolov Yura.
 2020-06-23 03:06:45 +02:00
Mike Pall
8ae5170cdc Improve assertions. 2020-06-15 02:52:00 +02:00
Mike Pall
b2307c8ad8 Remove pow() splitting and cleanup backends. 2020-05-23 21:33:01 +02:00
Mike Pall
5655be4546 Cleanup math function compilation and fix inconsistencies. 2020-05-22 04:53:35 +02:00
Mike Pall
03208c8162 Fix math.min()/math.max() inconsistencies. 2020-05-22 03:10:30 +02:00
Mike Pall
87b111f0fe Merge branch 'master' into v2.1 2020-01-20 23:34:21 +01:00
Mike Pall
38a5ed4b43 Bump copyright date. 2020-01-20 23:26:51 +01:00
Mike Pall
94d0b53004 MIPS: Add MIPS64 R6 port. 
Contributed by Hua Zhang, YunQiang Su from Wave Computing,
and Radovan Birdic from RT-RK.
Sponsored by Wave Computing.
 2020-01-20 22:15:45 +01:00
Mike Pall
99cdfbf6a1 MIPS64: Fix register allocation in assembly of HREF. 
Contributed by James Cowgill.
 2017-11-08 12:54:03 +01:00
Mike Pall
a057a07ab7 MIPS64: Add soft-float support to JIT compiler backend. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
 2017-06-07 23:56:54 +02:00
Mike Pall
0e4a551809 Merge branch 'master' into v2.1 2017-06-07 19:39:41 +02:00
Mike Pall
c7c3c4da43 MIPS: Fix handling of spare long-range jump slots. 
Contributed by Djordje Kovacevic and Stefan Pejic.
 2017-06-07 19:36:46 +02:00
Mike Pall
79fe5782f8 Merge branch 'master' into v2.1 2017-06-07 19:17:47 +02:00
Mike Pall
7381b62035 MIPS: Use precise search for exit jump patching. 
Contributed by Djordje Kovacevic and Stefan Pejic.
 2017-06-07 19:16:22 +02:00
Mike Pall
a25c0b99b8 MIPS64, part 2: Add MIPS64 hard-float JIT compiler backend. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
 2017-02-20 03:43:10 +01:00
Mike Pall
d0759e41a1 Merge branch 'master' into v2.1 2017-02-20 02:39:57 +01:00
Mike Pall
ee33a1f9b3 MIPS: Fix emitted code for U32 to float conversion. 2017-02-20 02:35:00 +01:00
Mike Pall
71ff7ef8a7 Merge branch 'master' into v2.1 2017-01-17 12:41:05 +01:00
Mike Pall
b93a1dd0c8 Bump copyright date to 2017. 2017-01-17 12:35:03 +01:00
Mike Pall
e577db52c5 Increase range of GG_State loads via IR_FLOAD with REF_NIL. 
Require 32 bit alignment and store offset/4 instead.
Otherwise this can overflow the 10 bit limit for the FOLD op2 key.
 2016-11-19 19:53:46 +01:00
Mike Pall
d9986fbadb MIPS64, part 1: Add MIPS64 support to interpreter. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
 2016-05-28 05:10:55 +02:00
Mike Pall
786dbb2ebd Add IR_FLOAD with REF_NIL for field loads from GG_State. 
Contributed by Peter Cawley.
 2016-05-21 01:00:49 +02:00
Mike Pall
cfa188f134 Move common 32/64 bit in-memory FP constants to jit_State. 
Prerequisite for immovable IR.
Contributed by Peter Cawley.
 2016-05-21 00:02:45 +02:00
Mike Pall
475a6ae33f Merge branch 'master' into v2.1 2016-05-20 20:26:39 +02:00
Mike Pall
37e1e70313 Add guard for obscure aliasing between open upvalues and SSA slots. 
Thanks to Peter Cawley.
 2016-05-20 20:24:06 +02:00
Mike Pall
64c6da6b21 MIPS soft-float: Fix code generation for HREF. 2016-03-10 17:08:55 +01:00
Mike Pall
f4231949b5 Merge branch 'master' into v2.1 2016-03-03 12:11:37 +01:00
Mike Pall
db1b399af1 Bump copyright date to 2016. 2016-03-03 12:02:22 +01:00
Mike Pall
a443889677 Don't allocate unused 2nd result register in JIT compiler backend. 2016-02-10 18:51:02 +01:00
Mike Pall
f547a1425e MIPS: Add soft-float support to JIT compiler backend. 2016-02-10 18:49:22 +01:00
Mike Pall
0a5045c34e Merge branch 'master' into v2.1 2015-01-06 00:12:45 +01:00
Mike Pall
86913b9bbf Bump copyright date to 2015. 2015-01-05 23:59:31 +01:00
Mike Pall
054e6abe37 Add LJ_FR2 mode: Two-slot frame info. 2015-01-03 15:04:38 +01:00
Mike Pall
2863b10956 Merge branch 'master' into v2.1 2014-02-20 15:09:02 +01:00
Mike Pall
2bc63bb6af Prevent BASE register coalescing if parent uses IR_RETF. 2014-02-19 17:09:22 +01:00
Mike Pall
a9d4543601 Merge branch 'master' into v2.1 2014-01-16 23:18:34 +01:00
Mike Pall
ef59e54820 Bump copyright date to 2014. 2014-01-16 23:10:16 +01:00
Mike Pall
d1194a82eb Low-overhead profiler, part 4: JIT compiler support. 2013-09-08 02:53:23 +02:00
Mike Pall
517500ba48 Save currently executing lua_State in g->cur_L. 
This is only a good approximation due to deficiencies in the design of
the Lua/C API. It indicates _some_ valid state that is/was executing.
Also reorder L->cframe stores to achieve a synchronously consistent state.
 2013-08-30 23:38:17 +02:00
Mike Pall
f1f7e40318 FFI: Compile VLA/VLS and large cdata allocs with default initialization. 2013-05-24 00:49:02 +02:00
Mike Pall
647cc4613f Merge branch 'master' into v2.1 2013-05-16 20:07:53 +02:00
Mike Pall
0f79d4741f Handle calls with max. args in backends even after SPLIT. 2013-05-16 19:59:38 +02:00
Mike Pall
acda75ad2c Refactor CCallInfo representation for split arguments. 2013-05-13 19:49:46 +02:00
Mike Pall
a2c78810ca Combine IR instruction dispatch for all assembler backends. 2013-04-22 22:32:41 +02:00
Mike Pall
2cd4ce6141 Use same HREF+EQ/NE optimization in all assembler backends. 2013-04-22 20:47:39 +02:00
Mike Pall
988e183965 Reorganize generic operations common to all assembler backends. 2013-04-22 17:34:36 +02:00
Mike Pall
5f1781a127 Compile string concatenations (BC_CAT). 2013-04-21 01:01:33 +02:00
Mike Pall
ac14d88030 Merge branch 'master' into v2.1 2013-04-04 18:20:58 +02:00
Mike Pall
389822d606 Fix spurious red zone overflows in machine code generation. 2013-04-04 17:19:31 +02:00
Mike Pall
b65196b7fd Merge branch 'master' into v2.1 2013-02-28 17:53:45 +01:00