ARM64: Add build infrastructure and initial port of interpreter.

This commit is contained in:
Mike Pall 2015-01-03 15:28:33 +01:00
parent cb481ddc8f
commit f307d0adaf
9 changed files with 3717 additions and 10 deletions

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@ -48,6 +48,7 @@ CCOPT= -O2 -fomit-frame-pointer
CCOPT_x86= -march=i686 -msse -msse2 -mfpmath=sse CCOPT_x86= -march=i686 -msse -msse2 -mfpmath=sse
CCOPT_x64= CCOPT_x64=
CCOPT_arm= CCOPT_arm=
CCOPT_arm64=
CCOPT_ppc= CCOPT_ppc=
CCOPT_ppcspe= CCOPT_ppcspe=
CCOPT_mips= CCOPT_mips=
@ -217,6 +218,9 @@ else
ifneq (,$(findstring LJ_TARGET_ARM ,$(TARGET_TESTARCH))) ifneq (,$(findstring LJ_TARGET_ARM ,$(TARGET_TESTARCH)))
TARGET_LJARCH= arm TARGET_LJARCH= arm
else else
ifneq (,$(findstring LJ_TARGET_ARM64 ,$(TARGET_TESTARCH)))
TARGET_LJARCH= arm64
else
ifneq (,$(findstring LJ_TARGET_PPC ,$(TARGET_TESTARCH))) ifneq (,$(findstring LJ_TARGET_PPC ,$(TARGET_TESTARCH)))
TARGET_LJARCH= ppc TARGET_LJARCH= ppc
else else
@ -236,6 +240,7 @@ endif
endif endif
endif endif
endif endif
endif
ifneq (,$(findstring LJ_TARGET_PS3 1,$(TARGET_TESTARCH))) ifneq (,$(findstring LJ_TARGET_PS3 1,$(TARGET_TESTARCH)))
TARGET_SYS= PS3 TARGET_SYS= PS3
@ -402,7 +407,9 @@ ifeq (Windows,$(TARGET_SYS))
DASM_AFLAGS+= -D WIN DASM_AFLAGS+= -D WIN
endif endif
ifeq (x64,$(TARGET_LJARCH)) ifeq (x64,$(TARGET_LJARCH))
ifeq (,$(findstring LJ_FR2 1,$(TARGET_TESTARCH)))
DASM_ARCH= x86 DASM_ARCH= x86
endif
else else
ifeq (arm,$(TARGET_LJARCH)) ifeq (arm,$(TARGET_LJARCH))
ifeq (iOS,$(TARGET_SYS)) ifeq (iOS,$(TARGET_SYS))

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@ -59,6 +59,8 @@ static int collect_reloc(BuildCtx *ctx, uint8_t *addr, int idx, int type);
#include "../dynasm/dasm_x86.h" #include "../dynasm/dasm_x86.h"
#elif LJ_TARGET_ARM #elif LJ_TARGET_ARM
#include "../dynasm/dasm_arm.h" #include "../dynasm/dasm_arm.h"
#elif LJ_TARGET_ARM64
#include "../dynasm/dasm_arm64.h"
#elif LJ_TARGET_PPC #elif LJ_TARGET_PPC
#include "../dynasm/dasm_ppc.h" #include "../dynasm/dasm_ppc.h"
#elif LJ_TARGET_PPCSPE #elif LJ_TARGET_PPCSPE

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@ -121,6 +121,15 @@ static void emit_asm_wordreloc(BuildCtx *ctx, uint8_t *p, int n,
ins, sym); ins, sym);
exit(1); exit(1);
} }
#elif LJ_TARGET_ARM64
if ((ins >> 26) == 0x25u) {
fprintf(ctx->fp, "\tbl %s\n", sym);
} else {
fprintf(stderr,
"Error: unsupported opcode %08x for %s symbol relocation.\n",
ins, sym);
exit(1);
}
#elif LJ_TARGET_PPC || LJ_TARGET_PPCSPE #elif LJ_TARGET_PPC || LJ_TARGET_PPCSPE
#if LJ_TARGET_PS3 #if LJ_TARGET_PS3
#define TOCPREFIX "." #define TOCPREFIX "."

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@ -695,6 +695,8 @@ static uint32_t jit_cpudetect(lua_State *L)
ver >= 60 ? JIT_F_ARMV6_ : 0; ver >= 60 ? JIT_F_ARMV6_ : 0;
flags |= LJ_ARCH_HASFPU == 0 ? 0 : ver >= 70 ? JIT_F_VFPV3 : JIT_F_VFPV2; flags |= LJ_ARCH_HASFPU == 0 ? 0 : ver >= 70 ? JIT_F_VFPV3 : JIT_F_VFPV2;
#endif #endif
#elif LJ_TARGET_ARM64
/* No optional CPU features to detect (for now). */
#elif LJ_TARGET_PPC #elif LJ_TARGET_PPC
#if LJ_HASJIT #if LJ_HASJIT
#if LJ_ARCH_SQRT #if LJ_ARCH_SQRT

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@ -19,12 +19,14 @@
#define LUAJIT_ARCH_x64 2 #define LUAJIT_ARCH_x64 2
#define LUAJIT_ARCH_ARM 3 #define LUAJIT_ARCH_ARM 3
#define LUAJIT_ARCH_arm 3 #define LUAJIT_ARCH_arm 3
#define LUAJIT_ARCH_PPC 4 #define LUAJIT_ARCH_ARM64 4
#define LUAJIT_ARCH_ppc 4 #define LUAJIT_ARCH_arm64 4
#define LUAJIT_ARCH_PPCSPE 5 #define LUAJIT_ARCH_PPC 5
#define LUAJIT_ARCH_ppcspe 5 #define LUAJIT_ARCH_ppc 6
#define LUAJIT_ARCH_MIPS 6 #define LUAJIT_ARCH_PPCSPE 6
#define LUAJIT_ARCH_mips 6 #define LUAJIT_ARCH_ppcspe 6
#define LUAJIT_ARCH_MIPS 7
#define LUAJIT_ARCH_mips 7
/* Target OS. */ /* Target OS. */
#define LUAJIT_OS_OTHER 0 #define LUAJIT_OS_OTHER 0
@ -43,6 +45,8 @@
#define LUAJIT_TARGET LUAJIT_ARCH_X64 #define LUAJIT_TARGET LUAJIT_ARCH_X64
#elif defined(__arm__) || defined(__arm) || defined(__ARM__) || defined(__ARM) #elif defined(__arm__) || defined(__arm) || defined(__ARM__) || defined(__ARM)
#define LUAJIT_TARGET LUAJIT_ARCH_ARM #define LUAJIT_TARGET LUAJIT_ARCH_ARM
#elif defined(__aarch64__)
#define LUAJIT_TARGET LUAJIT_ARCH_ARM64
#elif defined(__ppc__) || defined(__ppc) || defined(__PPC__) || defined(__PPC) || defined(__powerpc__) || defined(__powerpc) || defined(__POWERPC__) || defined(__POWERPC) || defined(_M_PPC) #elif defined(__ppc__) || defined(__ppc) || defined(__PPC__) || defined(__PPC) || defined(__powerpc__) || defined(__powerpc) || defined(__POWERPC__) || defined(__POWERPC) || defined(_M_PPC)
#ifdef __NO_FPRS__ #ifdef __NO_FPRS__
#define LUAJIT_TARGET LUAJIT_ARCH_PPCSPE #define LUAJIT_TARGET LUAJIT_ARCH_PPCSPE
@ -191,6 +195,24 @@
#define LJ_ARCH_VERSION 50 #define LJ_ARCH_VERSION 50
#endif #endif
#elif LUAJIT_TARGET == LUAJIT_ARCH_ARM64
#define LJ_ARCH_NAME "arm64"
#define LJ_ARCH_BITS 64
#define LJ_ARCH_ENDIAN LUAJIT_LE
#define LJ_TARGET_ARM64 1
#define LJ_TARGET_EHRETREG 0
#define LJ_TARGET_JUMPRANGE 27 /* +-2^27 = +-128MB */
#define LJ_TARGET_MASKSHIFT 1
#define LJ_TARGET_MASKROT 1
#define LJ_TARGET_UNIFYROT 2 /* Want only IR_BROR. */
#define LJ_TARGET_GC64 1
#define LJ_ARCH_NUMMODE LJ_NUMMODE_DUAL
#define LJ_ARCH_NOFFI 1 /* NYI */
#define LJ_ARCH_NOJIT 1 /* NYI */
#define LJ_ARCH_VERSION 80
#elif LUAJIT_TARGET == LUAJIT_ARCH_PPC #elif LUAJIT_TARGET == LUAJIT_ARCH_PPC
#define LJ_ARCH_NAME "ppc" #define LJ_ARCH_NAME "ppc"
@ -327,6 +349,13 @@
#if !(__ARM_EABI__ || LJ_TARGET_IOS) #if !(__ARM_EABI__ || LJ_TARGET_IOS)
#error "Only ARM EABI or iOS 3.0+ ABI is supported" #error "Only ARM EABI or iOS 3.0+ ABI is supported"
#endif #endif
#elif LJ_TARGET_ARM64
#if defined(__AARCH64EB__)
#error "No support for big-endian ARM64"
#endif
#if defined(_ILP32)
#error "No support for ILP32 model on ARM64"
#endif
#elif LJ_TARGET_PPC || LJ_TARGET_PPCSPE #elif LJ_TARGET_PPC || LJ_TARGET_PPCSPE
#if defined(_SOFT_FLOAT) || defined(_SOFT_DOUBLE) #if defined(_SOFT_FLOAT) || defined(_SOFT_DOUBLE)
#error "No support for PowerPC CPUs without double-precision FPU" #error "No support for PowerPC CPUs without double-precision FPU"

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@ -159,6 +159,15 @@ enum { LJ_CONT_TAILCALL, LJ_CONT_FFI_CALLBACK }; /* Special continuations. */
#define CFRAME_SIZE 64 #define CFRAME_SIZE 64
#endif #endif
#define CFRAME_SHIFT_MULTRES 3 #define CFRAME_SHIFT_MULTRES 3
#elif LJ_TARGET_ARM64
#define CFRAME_OFS_ERRF 196
#define CFRAME_OFS_NRES 200
#define CFRAME_OFS_PREV 160
#define CFRAME_OFS_L 176
#define CFRAME_OFS_PC 168
#define CFRAME_OFS_MULTRES 192
#define CFRAME_SIZE 208
#define CFRAME_SHIFT_MULTRES 3
#elif LJ_TARGET_PPC #elif LJ_TARGET_PPC
#if LJ_TARGET_XBOX360 #if LJ_TARGET_XBOX360
#define CFRAME_OFS_ERRF 424 #define CFRAME_OFS_ERRF 424

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@ -50,7 +50,7 @@ LJ_ASMF void lj_vm_exit_handler(void);
LJ_ASMF void lj_vm_exit_interp(void); LJ_ASMF void lj_vm_exit_interp(void);
/* Internal math helper functions. */ /* Internal math helper functions. */
#if LJ_TARGET_PPC #if LJ_TARGET_PPC || LJ_TARGET_ARM64
#define lj_vm_floor floor #define lj_vm_floor floor
#define lj_vm_ceil ceil #define lj_vm_ceil ceil
#else #else
@ -77,7 +77,7 @@ LJ_ASMF void lj_vm_powi_sse(void);
#else #else
LJ_ASMF double lj_vm_powi(double, int32_t); LJ_ASMF double lj_vm_powi(double, int32_t);
#endif #endif
#if LJ_TARGET_PPC #if LJ_TARGET_PPC || LJ_TARGET_ARM64
#define lj_vm_trunc trunc #define lj_vm_trunc trunc
#else #else
LJ_ASMF double lj_vm_trunc(double); LJ_ASMF double lj_vm_trunc(double);

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@ -73,7 +73,7 @@ double lj_vm_exp2(double a)
} }
#endif #endif
#if !(LJ_TARGET_ARM || LJ_TARGET_PPC) #if !(LJ_TARGET_ARM || LJ_TARGET_ARM64 || LJ_TARGET_PPC)
int32_t LJ_FASTCALL lj_vm_modi(int32_t a, int32_t b) int32_t LJ_FASTCALL lj_vm_modi(int32_t a, int32_t b)
{ {
uint32_t y, ua, ub; uint32_t y, ua, ub;

3649
src/vm_arm64.dasc Normal file

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