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PPC/e500: Drop support for this architecture.
This commit is contained in:
Mike Pall
parent
968725c4d5
commit
dfe84fd8c5
@ -153,7 +153,7 @@ Contains the target OS name:
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<h3 id="jit_arch"><tt>jit.arch</tt></h3>
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<p>
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Contains the target architecture name:
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"x86", "x64", "arm", "ppc", "ppcspe", or "mips".
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"x86", "x64", "arm", "ppc", or "mips".
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</p>
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<h2 id="jit_opt"><tt>jit.opt.*</tt> — JIT compiler optimization control</h2>
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@ -141,13 +141,6 @@ operating systems, CPUs and compilers:
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<td class="compatos">XEDK (<a href="#xbox360">Xbox 360</a>)</td>
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</tr>
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<tr class="odd">
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<td class="compatcpu"><a href="#cross2">PPC/e500v2</a></td>
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<td class="compatos">GCC 4.3+</td>
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<td class="compatos">GCC 4.3+</td>
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<td class="compatos compatno"> </td>
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<td class="compatos compatno"> </td>
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</tr>
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<tr class="even">
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<td class="compatcpu"><a href="#cross2">MIPS</a></td>
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<td class="compatos">GCC 4.3+</td>
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<td class="compatos">GCC 4.3+</td>
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@ -387,8 +380,6 @@ make HOST_CC="gcc -m32" CROSS=arm-linux-gnueabihf-
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# PPC
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make HOST_CC="gcc -m32" CROSS=powerpc-linux-gnu-
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# PPC/e500v2 (fast interpreter only)
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make HOST_CC="gcc -m32" CROSS=powerpc-e500v2-linux-gnuspe-
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# MIPS big-endian
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make HOST_CC="gcc -m32" CROSS=mips-linux-
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@ -172,7 +172,7 @@ LuaJIT is Copyright © 2005-2014 Mike Pall, released under the
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<tr><td>GCC</td><td>CLANG<br>LLVM</td><td>MSVC</td></tr>
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</table>
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<table class="feature cpu">
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<tr><td>x86</td><td>x64</td><td>ARM</td><td>PPC</td><td>e500</td><td>MIPS</td></tr>
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<tr><td>x86</td><td>x64</td><td>ARM</td><td>PPC</td><td>MIPS</td></tr>
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</table>
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<table class="feature fcompat">
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<tr><td>Lua 5.1<br>API+ABI</td><td>+ JIT</td><td>+ BitOp</td><td>+ FFI</td><td>Drop-in<br>DLL/.so</td></tr>
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@ -50,7 +50,6 @@ CCOPT_x64=
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CCOPT_arm=
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CCOPT_arm64=
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CCOPT_ppc=
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CCOPT_ppcspe=
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CCOPT_mips=
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#
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CCDEBUG=
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@ -224,9 +223,6 @@ else
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ifneq (,$(findstring LJ_TARGET_PPC ,$(TARGET_TESTARCH)))
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TARGET_LJARCH= ppc
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else
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ifneq (,$(findstring LJ_TARGET_PPCSPE ,$(TARGET_TESTARCH)))
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TARGET_LJARCH= ppcspe
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else
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ifneq (,$(findstring LJ_TARGET_MIPS ,$(TARGET_TESTARCH)))
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ifneq (,$(findstring MIPSEL ,$(TARGET_TESTARCH)))
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TARGET_ARCH= -D__MIPSEL__=1
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@ -240,7 +236,6 @@ endif
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endif
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endif
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endif
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endif
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ifneq (,$(findstring LJ_TARGET_PS3 1,$(TARGET_TESTARCH)))
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TARGET_SYS= PS3
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@ -63,8 +63,6 @@ static int collect_reloc(BuildCtx *ctx, uint8_t *addr, int idx, int type);
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#include "../dynasm/dasm_arm64.h"
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#elif LJ_TARGET_PPC
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#include "../dynasm/dasm_ppc.h"
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#elif LJ_TARGET_PPCSPE
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#include "../dynasm/dasm_ppc.h"
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#elif LJ_TARGET_MIPS
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#include "../dynasm/dasm_mips.h"
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#else
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@ -115,7 +113,7 @@ static const char *sym_decorate(BuildCtx *ctx,
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name[0] = '@';
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else
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*p = '\0';
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#elif (LJ_TARGET_PPC || LJ_TARGET_PPCSPE) && !LJ_TARGET_CONSOLE
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#elif LJ_TARGET_PPC && !LJ_TARGET_CONSOLE
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/* Keep @plt. */
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#else
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*p = '\0';
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@ -130,7 +130,7 @@ static void emit_asm_wordreloc(BuildCtx *ctx, uint8_t *p, int n,
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ins, sym);
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exit(1);
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}
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#elif LJ_TARGET_PPC || LJ_TARGET_PPCSPE
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#elif LJ_TARGET_PPC
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#if LJ_TARGET_PS3
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#define TOCPREFIX "."
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#else
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@ -313,10 +313,7 @@ void emit_asm(BuildCtx *ctx)
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#if !(LJ_TARGET_PS3 || LJ_TARGET_PSVITA)
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fprintf(ctx->fp, "\t.section .note.GNU-stack,\"\"," ELFASM_PX "progbits\n");
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#endif
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#if LJ_TARGET_PPCSPE
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/* Soft-float ABI + SPE. */
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fprintf(ctx->fp, "\t.gnu_attribute 4, 2\n\t.gnu_attribute 8, 3\n");
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#elif LJ_TARGET_PPC && !LJ_TARGET_PS3
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#if LJ_TARGET_PPC && !LJ_TARGET_PS3
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/* Hard-float ABI. */
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fprintf(ctx->fp, "\t.gnu_attribute 4, 1\n");
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#endif
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@ -63,7 +63,7 @@ local map_type = {
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}
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local map_arch = {
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x86 = true, x64 = true, arm = true, ppc = true, ppcspe = true,
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x86 = true, x64 = true, arm = true, ppc = true,
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mips = true, mipsel = true,
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}
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@ -202,7 +202,7 @@ typedef struct {
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local is64, isbe = false, false
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if ctx.arch == "x64" then
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is64 = true
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elseif ctx.arch == "ppc" or ctx.arch == "ppcspe" or ctx.arch == "mips" then
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elseif ctx.arch == "ppc" or ctx.arch == "mips" then
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isbe = true
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end
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@ -237,7 +237,7 @@ typedef struct {
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hdr.eendian = isbe and 2 or 1
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hdr.eversion = 1
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hdr.type = f16(1)
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hdr.machine = f16(({ x86=3, x64=62, arm=40, ppc=20, ppcspe=20, mips=8, mipsel=8 })[ctx.arch])
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hdr.machine = f16(({ x86=3, x64=62, arm=40, ppc=20, mips=8, mipsel=8 })[ctx.arch])
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if ctx.arch == "mips" or ctx.arch == "mipsel" then
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hdr.flags = 0x50001006
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end
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@ -706,8 +706,6 @@ static uint32_t jit_cpudetect(lua_State *L)
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flags |= JIT_F_ROUND;
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#endif
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#endif
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#elif LJ_TARGET_PPCSPE
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/* Nothing to do. */
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#elif LJ_TARGET_MIPS
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#if LJ_HASJIT
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/* Compile-time MIPS CPU detection. */
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@ -22,11 +22,9 @@
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#define LUAJIT_ARCH_ARM64 4
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#define LUAJIT_ARCH_arm64 4
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#define LUAJIT_ARCH_PPC 5
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#define LUAJIT_ARCH_ppc 6
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#define LUAJIT_ARCH_PPCSPE 6
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#define LUAJIT_ARCH_ppcspe 6
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#define LUAJIT_ARCH_MIPS 7
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#define LUAJIT_ARCH_mips 7
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#define LUAJIT_ARCH_ppc 5
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#define LUAJIT_ARCH_MIPS 6
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#define LUAJIT_ARCH_mips 6
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/* Target OS. */
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#define LUAJIT_OS_OTHER 0
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@ -48,11 +46,7 @@
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#elif defined(__aarch64__)
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#define LUAJIT_TARGET LUAJIT_ARCH_ARM64
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#elif defined(__ppc__) || defined(__ppc) || defined(__PPC__) || defined(__PPC) || defined(__powerpc__) || defined(__powerpc) || defined(__POWERPC__) || defined(__POWERPC) || defined(_M_PPC)
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#ifdef __NO_FPRS__
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#define LUAJIT_TARGET LUAJIT_ARCH_PPCSPE
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#else
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#define LUAJIT_TARGET LUAJIT_ARCH_PPC
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#endif
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#elif defined(__mips__) || defined(__mips) || defined(__MIPS__) || defined(__MIPS)
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#define LUAJIT_TARGET LUAJIT_ARCH_MIPS
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#else
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@ -260,26 +254,6 @@
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#define LJ_ARCH_XENON 1
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#endif
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#elif LUAJIT_TARGET == LUAJIT_ARCH_PPCSPE
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#error "The PPC/e500 port is broken and will be abandoned with LuaJIT 2.1"
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#define LJ_ARCH_NAME "ppcspe"
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#define LJ_ARCH_BITS 32
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#define LJ_ARCH_ENDIAN LUAJIT_BE
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#ifndef LJ_ABI_SOFTFP
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#define LJ_ABI_SOFTFP 1
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#endif
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#define LJ_ABI_EABI 1
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#define LJ_TARGET_PPCSPE 1
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#define LJ_TARGET_EHRETREG 3
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#define LJ_TARGET_JUMPRANGE 25 /* +-2^25 = +-32MB */
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#define LJ_TARGET_MASKSHIFT 0
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#define LJ_TARGET_MASKROT 1
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#define LJ_TARGET_UNIFYROT 1 /* Want only IR_BROL. */
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#define LJ_ARCH_NUMMODE LJ_NUMMODE_SINGLE
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#define LJ_ARCH_NOFFI 1 /* NYI: comparisons, calls. */
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#define LJ_ARCH_NOJIT 1
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#elif LUAJIT_TARGET == LUAJIT_ARCH_MIPS
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#if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL)
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@ -356,7 +330,7 @@
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#if defined(_ILP32)
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#error "No support for ILP32 model on ARM64"
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#endif
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#elif LJ_TARGET_PPC || LJ_TARGET_PPCSPE
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#elif LJ_TARGET_PPC
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#if defined(_SOFT_FLOAT) || defined(_SOFT_DOUBLE)
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#error "No support for PowerPC CPUs without double-precision FPU"
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#endif
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@ -366,6 +340,9 @@
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#if defined(_LP64)
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#error "No support for PowerPC 64 bit mode"
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#endif
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#ifdef __NO_FPRS__
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#error "No support for PPC/e500 anymore (use LuaJIT 2.0)"
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#endif
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#elif LJ_TARGET_MIPS
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#if defined(__mips_soft_float)
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#error "No support for MIPS CPUs without FPU"
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@ -338,42 +338,6 @@
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if (ctype_isfp(ctr->info) && ctr->size == sizeof(float)) \
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ctr = ctype_get(cts, CTID_DOUBLE); /* FPRs always hold doubles. */
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#elif LJ_TARGET_PPCSPE
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/* -- PPC/SPE calling conventions ----------------------------------------- */
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#define CCALL_HANDLE_STRUCTRET \
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cc->retref = 1; /* Return all structs by reference. */ \
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cc->gpr[ngpr++] = (GPRArg)dp;
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#define CCALL_HANDLE_COMPLEXRET \
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/* Complex values are returned in 2 or 4 GPRs. */ \
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cc->retref = 0;
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#define CCALL_HANDLE_COMPLEXRET2 \
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memcpy(dp, sp, ctr->size); /* Copy complex from GPRs. */
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#define CCALL_HANDLE_STRUCTARG \
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rp = cdataptr(lj_cdata_new(cts, did, sz)); \
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sz = CTSIZE_PTR; /* Pass all structs by reference. */
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#define CCALL_HANDLE_COMPLEXARG \
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/* Pass complex by value in 2 or 4 GPRs. */
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/* PPC/SPE has a softfp ABI. */
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#define CCALL_HANDLE_REGARG \
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if (n > 1) { /* Doesn't fit in a single GPR? */ \
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lua_assert(n == 2 || n == 4); /* int64_t, double or complex (float). */ \
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if (n == 2) \
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ngpr = (ngpr + 1u) & ~1u; /* Only align 64 bit value to regpair. */ \
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else if (ngpr + n > maxgpr) \
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ngpr = maxgpr; /* Prevent reordering. */ \
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} \
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if (ngpr + n <= maxgpr) { \
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dp = &cc->gpr[ngpr]; \
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ngpr += n; \
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goto done; \
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}
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#elif LJ_TARGET_MIPS
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/* -- MIPS calling conventions -------------------------------------------- */
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@ -80,16 +80,6 @@ typedef union FPRArg {
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typedef intptr_t GPRArg;
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typedef double FPRArg;
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#elif LJ_TARGET_PPCSPE
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#define CCALL_NARG_GPR 8
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#define CCALL_NARG_FPR 0
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#define CCALL_NRET_GPR 4 /* For softfp complex double. */
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#define CCALL_NRET_FPR 0
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#define CCALL_SPS_FREE 0 /* NYI */
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typedef intptr_t GPRArg;
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#elif LJ_TARGET_MIPS
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#define CCALL_NARG_GPR 4
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@ -263,7 +263,7 @@ typedef struct CTState {
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/* -- Predefined types ---------------------------------------------------- */
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/* Target-dependent types. */
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#if LJ_TARGET_PPC || LJ_TARGET_PPCSPE
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#if LJ_TARGET_PPC
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#define CTTYDEFP(_) \
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_(LINT32, 4, CT_NUM, CTF_LONG|CTALIGN(2))
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#else
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@ -197,15 +197,6 @@ enum { LJ_CONT_TAILCALL, LJ_CONT_FFI_CALLBACK }; /* Special continuations. */
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#define CFRAME_SIZE 272
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#define CFRAME_SHIFT_MULTRES 3
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#endif
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#elif LJ_TARGET_PPCSPE
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#define CFRAME_OFS_ERRF 28
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#define CFRAME_OFS_NRES 24
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#define CFRAME_OFS_PREV 20
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#define CFRAME_OFS_L 16
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#define CFRAME_OFS_PC 12
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#define CFRAME_OFS_MULTRES 8
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#define CFRAME_SIZE 184
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#define CFRAME_SHIFT_MULTRES 3
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#elif LJ_TARGET_MIPS
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#define CFRAME_OFS_ERRF 124
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#define CFRAME_OFS_NRES 120
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3685
src/vm_ppcspe.dasc
3685
src/vm_ppcspe.dasc
File diff suppressed because it is too large
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