riscv(jit): add GDBJIT support

This commit is contained in:
gns 2024-03-06 09:42:34 +08:00 committed by gns
parent 6a2c877aa8
commit dae3b8fc1e

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@ -306,6 +306,9 @@ enum {
#elif LJ_TARGET_MIPS #elif LJ_TARGET_MIPS
DW_REG_SP = 29, DW_REG_SP = 29,
DW_REG_RA = 31, DW_REG_RA = 31,
#elif LJ_TARGET_RISCV64
DW_REG_SP = 2,
DW_REG_RA = 1,
#else #else
#error "Unsupported target architecture" #error "Unsupported target architecture"
#endif #endif
@ -383,6 +386,8 @@ static const ELFheader elfhdr_template = {
.machine = 20, .machine = 20,
#elif LJ_TARGET_MIPS #elif LJ_TARGET_MIPS
.machine = 8, .machine = 8,
#elif LJ_TARGET_RISCV64
.machine = 243,
#else #else
#error "Unsupported target architecture" #error "Unsupported target architecture"
#endif #endif
@ -591,6 +596,16 @@ static void LJ_FASTCALL gdbjit_ehframe(GDBJITctx *ctx)
for (i = 23; i >= 16; i--) { DB(DW_CFA_offset|i); DUV(26-i); } for (i = 23; i >= 16; i--) { DB(DW_CFA_offset|i); DUV(26-i); }
for (i = 30; i >= 20; i -= 2) { DB(DW_CFA_offset|32|i); DUV(42-i); } for (i = 30; i >= 20; i -= 2) { DB(DW_CFA_offset|32|i); DUV(42-i); }
} }
#elif LJ_TARGET_RISCV64
{
int i;
for (i = 27; i >= 18; i--) { DB(DW_CFA_offset|i); DUV(27-i+7); }
DB(DW_CFA_offset|9); DUV(17);
DB(DW_CFA_offset|8); DUV(18);
for (i = 27; i >= 18; i--) { DB(DW_CFA_offset|32|i); DUV(27-i+19); }
DB(DW_CFA_offset|32|9); DUV(29);
DB(DW_CFA_offset|32|8); DUV(30);
}
#else #else
#error "Unsupported target architecture" #error "Unsupported target architecture"
#endif #endif