diff --git a/src/lj_asm_arm.h b/src/lj_asm_arm.h index 56ce4a07..d2fad141 100644 --- a/src/lj_asm_arm.h +++ b/src/lj_asm_arm.h @@ -1007,14 +1007,15 @@ static ARMIns asm_fxstoreins(ASMState *as, IRIns *ir) static void asm_fload(ASMState *as, IRIns *ir) { + Reg dest = ra_dest(as, ir, RSET_GPR); + ARMIns ai = asm_fxloadins(as, ir); + Reg idx; + int32_t ofs; if (ir->op1 == REF_NIL) { /* FLOAD from GG_State with offset. */ - /* We can end up here if DCE is turned off. */ - lj_assertA(!ra_used(ir), "NYI FLOAD GG_State"); + idx = ra_allock(as, (int32_t)(ir->op2<<2) + (int32_t)J2GG(as->J), RSET_GPR); + ofs = 0; } else { - Reg dest = ra_dest(as, ir, RSET_GPR); - Reg idx = ra_alloc1(as, ir->op1, RSET_GPR); - ARMIns ai = asm_fxloadins(as, ir); - int32_t ofs; + idx = ra_alloc1(as, ir->op1, RSET_GPR); if (ir->op2 == IRFL_TAB_ARRAY) { ofs = asm_fuseabase(as, ir->op1); if (ofs) { /* Turn the t->array load into an add for colocated arrays. */ @@ -1023,11 +1024,11 @@ static void asm_fload(ASMState *as, IRIns *ir) } } ofs = field_ofs[ir->op2]; - if ((ai & 0x04000000)) - emit_lso(as, ai, dest, idx, ofs); - else - emit_lsox(as, ai, dest, idx, ofs); } + if ((ai & 0x04000000)) + emit_lso(as, ai, dest, idx, ofs); + else + emit_lsox(as, ai, dest, idx, ofs); } static void asm_fstore(ASMState *as, IRIns *ir) diff --git a/src/lj_ffrecord.c b/src/lj_ffrecord.c index 2557cadf..d34340ce 100644 --- a/src/lj_ffrecord.c +++ b/src/lj_ffrecord.c @@ -1086,13 +1086,7 @@ static TRef recff_io_fp(jit_State *J, TRef *udp, int32_t id) { TRef tr, ud, fp; if (id) { /* io.func() */ -#if LJ_GC64 - /* TODO: fix ARM32 asm_fload(), so we can use this for all archs. */ ud = lj_ir_ggfload(J, IRT_UDATA, GG_OFS(g.gcroot[id])); -#else - tr = lj_ir_kptr(J, &J2G(J)->gcroot[id]); - ud = emitir(IRT(IR_XLOAD, IRT_UDATA), tr, 0); -#endif } else { /* fp:method() */ ud = J->base[0]; if (!tref_isudata(ud)) diff --git a/src/lj_record.c b/src/lj_record.c index 2a4a766e..cfa48ecf 100644 --- a/src/lj_record.c +++ b/src/lj_record.c @@ -1009,13 +1009,8 @@ int lj_record_mm_lookup(jit_State *J, RecordIndex *ix, MMS mm) } /* The cdata metatable is treated as immutable. */ if (LJ_HASFFI && tref_iscdata(ix->tab)) goto immutable_mt; -#if LJ_GC64 - /* TODO: fix ARM32 asm_fload(), so we can use this for all archs. */ ix->mt = mix.tab = lj_ir_ggfload(J, IRT_TAB, GG_OFS(g.gcroot[GCROOT_BASEMT+itypemap(&ix->tabv)])); -#else - ix->mt = mix.tab = lj_ir_ktab(J, mt); -#endif goto nocheck; } ix->mt = mt ? mix.tab : TREF_NIL;