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riscv(interp): add base assembly interpreter VM

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gns 2024-03-06 08:40:08 +08:00 committed by gns
parent c27634a26d
commit caeefe25d0
3 changed files with 3586 additions and 4 deletions
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3
src/lj_vm.h
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@ -37,6 +37,9 @@ LJ_ASMF int lj_vm_cpuid(uint32_t f, uint32_t res[4]);
#if LJ_TARGET_PPC
void lj_vm_cachesync(void *start, void *end);
#endif
#if LJ_TARGET_RISCV64
void lj_vm_fence_rw_rw();
#endif
LJ_ASMF double lj_vm_foldarith(double x, double y, int op);
#if LJ_HASJIT
LJ_ASMF double lj_vm_foldfpm(double x, int op);

3
src/lj_vmmath.c
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@ -69,7 +69,8 @@ double lj_vm_foldarith(double x, double y, int op)
/* -- Helper functions for generated machine code ------------------------- */
#if (LJ_HASJIT && !(LJ_TARGET_ARM || LJ_TARGET_ARM64 || LJ_TARGET_PPC)) || LJ_TARGET_MIPS
#if (LJ_HASJIT && !(LJ_TARGET_ARM || LJ_TARGET_ARM64 || LJ_TARGET_PPC)) || LJ_TARGET_MIPS \
|| LJ_TARGET_RISCV64
int32_t LJ_FASTCALL lj_vm_modi(int32_t a, int32_t b)
{
uint32_t y, ua, ub;

3584
src/vm_riscv64.dasc
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