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ARM: Add ARM-specific tuning to generic assembler backend.
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aaba681056
commit
afad72af25
39
src/lj_asm.c
39
src/lj_asm.c
@ -448,7 +448,7 @@ static void ra_evictset(ASMState *as, RegSet drop)
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as->modset |= drop;
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as->modset |= drop;
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drop &= ~as->freeset;
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drop &= ~as->freeset;
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while (drop) {
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while (drop) {
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Reg r = rset_picktop(drop);
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Reg r = rset_pickbot(drop);
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ra_restore(as, regcost_ref(as->cost[r]));
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ra_restore(as, regcost_ref(as->cost[r]));
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rset_clear(drop, r);
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rset_clear(drop, r);
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checkmclim(as);
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checkmclim(as);
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@ -604,7 +604,14 @@ static Reg ra_dest(ASMState *as, IRIns *ir, RegSet allow)
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ra_free(as, dest);
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ra_free(as, dest);
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ra_modified(as, dest);
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ra_modified(as, dest);
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} else {
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} else {
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dest = ra_scratch(as, allow);
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if (ra_hashint(dest) && rset_test(as->freeset, ra_gethint(dest))) {
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dest = ra_gethint(dest);
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ra_modified(as, dest);
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RA_DBGX((as, "dest $r", dest));
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} else {
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dest = ra_scratch(as, allow);
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}
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ir->r = dest;
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}
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}
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if (LJ_UNLIKELY(ra_hasspill(ir->s))) ra_save(as, ir, dest);
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if (LJ_UNLIKELY(ra_hasspill(ir->s))) ra_save(as, ir, dest);
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return dest;
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return dest;
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@ -932,7 +939,7 @@ static void asm_phi_shuffle(ASMState *as)
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RegSet blockedby = RSET_EMPTY;
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RegSet blockedby = RSET_EMPTY;
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RegSet phiset = as->phiset;
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RegSet phiset = as->phiset;
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while (phiset) { /* Check all left PHI operand registers. */
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while (phiset) { /* Check all left PHI operand registers. */
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Reg r = rset_picktop(phiset);
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Reg r = rset_pickbot(phiset);
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IRIns *irl = IR(as->phireg[r]);
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IRIns *irl = IR(as->phireg[r]);
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Reg left = irl->r;
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Reg left = irl->r;
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if (r != left) { /* Mismatch? */
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if (r != left) { /* Mismatch? */
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@ -966,7 +973,7 @@ static void asm_phi_shuffle(ASMState *as)
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/* Restore/remat invariants whose registers are modified inside the loop. */
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/* Restore/remat invariants whose registers are modified inside the loop. */
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work = as->modset & ~(as->freeset | as->phiset);
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work = as->modset & ~(as->freeset | as->phiset);
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while (work) {
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while (work) {
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Reg r = rset_picktop(work);
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Reg r = rset_pickbot(work);
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ra_restore(as, regcost_ref(as->cost[r]));
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ra_restore(as, regcost_ref(as->cost[r]));
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rset_clear(work, r);
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rset_clear(work, r);
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checkmclim(as);
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checkmclim(as);
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@ -1311,6 +1318,9 @@ static void asm_setup_regsp(ASMState *as)
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GCtrace *T = as->T;
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GCtrace *T = as->T;
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IRRef i, nins;
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IRRef i, nins;
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int inloop;
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int inloop;
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#if LJ_TARGET_ARM
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uint32_t rload = 0xa6402a64;
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#endif
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ra_setup(as);
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ra_setup(as);
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@ -1353,7 +1363,20 @@ static void asm_setup_regsp(ASMState *as)
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continue;
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continue;
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}
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}
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}
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}
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#if LJ_TARGET_ARM
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if ((ir->op2 & IRSLOAD_TYPECHECK) || (ir+1)->o == IR_HIOP) {
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ir->prev = (uint16_t)REGSP_HINT((rload & 15));
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rload = lj_ror(rload, 4);
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continue;
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}
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#endif
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break;
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break;
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#if LJ_TARGET_ARM
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case IR_ALOAD: case IR_HLOAD: case IR_ULOAD: case IR_VLOAD:
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ir->prev = (uint16_t)REGSP_HINT((rload & 15));
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rload = lj_ror(rload, 4);
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continue;
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#endif
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case IR_CALLXS: {
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case IR_CALLXS: {
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CCallInfo ci;
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CCallInfo ci;
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ci.flags = asm_callx_flags(as, ir);
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ci.flags = asm_callx_flags(as, ir);
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@ -1384,6 +1407,14 @@ static void asm_setup_regsp(ASMState *as)
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continue;
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continue;
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}
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}
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}
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}
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#if LJ_TARGET_ARM
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/* fallthrough */
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case IR_ALOAD: case IR_HLOAD: case IR_ULOAD: case IR_VLOAD:
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if (ra_hashint((ir-1)->r)) {
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ir->prev = (ir-1)->prev + 1;
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continue;
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}
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#endif
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break;
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break;
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#endif
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#endif
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case IR_CALLN: case IR_CALLXS:
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case IR_CALLN: case IR_CALLXS:
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