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https://github.com/LuaJIT/LuaJIT.git
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Add SSE2 variants of basic arithmetic ops in interpreter.
This commit is contained in:
Mike Pall
parent
64a4528cac
commit
ab02f069aa
@ -322,6 +322,40 @@
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|.macro fdup; fld st0; .endmacro
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|.macro fpop1; fstp st1; .endmacro
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|
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|// Synthesize SSE FP constants.
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|.macro sseconst_sign, reg, tmp // Synthesize sign mask.
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|.if X64
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| mov64 tmp, U64x(80000000,00000000); movd reg, tmp
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|.else
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| mov tmp, 0x80000000; movd xmm1, tmp; pshufd reg, reg, 0x51
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|.endif
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|.endmacro
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|
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|.macro sseconst_abs, reg, tmp // Synthesize abs mask.
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|.if X64
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| mov64 tmp, U64x(7fffffff,ffffffff); movd reg, tmp
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|.else
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| pxor reg, reg; pcmpeqd reg, reg; psrlq reg, 1
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|.endif
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|.endmacro
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|
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|.macro sseconst_1, reg, tmp // Synthesize 1.0.
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|.if X64
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| mov64 tmp, U64x(3ff00000,00000000)
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| movd reg, tmp
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|.else
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| mov tmp, 0x3ff00000; movd reg, tmp; pshufd reg, reg, 0x51
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|.endif
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|.endmacro
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|
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|.macro sseconst_2p52, reg, tmp // Synthesize 2^52.
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|.if X64
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| mov64 tmp, U64x(43300000,00000000); movd reg, tmp
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|.else
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| mov tmp, 0x43300000; movd reg, tmp; pshufd reg, reg, 0x51
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|.endif
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|.endmacro
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|
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|// Move table write barrier back. Overwrites reg.
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|.macro barrierback, tab, reg
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| and byte tab->marked, cast_byte(~LJ_GC_BLACK) // black2gray(tab)
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@ -334,7 +368,7 @@
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/* Generate subroutines used by opcodes and other parts of the VM. */
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/* The .code_sub section should be last to help static branch prediction. */
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static void build_subroutines(BuildCtx *ctx, int cmov)
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static void build_subroutines(BuildCtx *ctx, int cmov, int sse)
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{
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|.code_sub
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@ -2454,21 +2488,51 @@ static void build_subroutines(BuildCtx *ctx, int cmov)
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| vm_round 0x0c00, 0xffff
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|
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|// FP modulo x%y. Called by BC_MOD* and vm_arith.
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|// Args/ret on x87 stack (y on top). No xmm registers modified.
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|// Caveat: needs 3 slots on x87 stack! RC (eax) modified!
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|->vm_mod:
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| fld st1
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| fdiv st1
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| fnstcw word [esp+4]
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| mov ax, 0x0400
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| or ax, [esp+4]
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| and ax, 0xf7ff
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| mov [esp+6], ax
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| fldcw word [esp+6]
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| frndint
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| fldcw word [esp+4]
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| fmulp st1
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| fsubp st1
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if (sse) {
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|// Args in xmm0/xmm1, return value in xmm0.
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|// Caveat: xmm0-xmm5 and RC (eax) modified!
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| movaps xmm5, xmm0
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| divsd xmm0, xmm1
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| sseconst_abs xmm2, RDa
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| sseconst_2p52 xmm3, RDa
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| movaps xmm4, xmm0
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| andpd xmm4, xmm2 // |x/y|
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| ucomisd xmm3, xmm4 // No truncation if 2^52 <= |x/y|.
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| jbe >1
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| andnpd xmm2, xmm0 // Isolate sign bit.
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| addsd xmm4, xmm3 // (|x/y| + 2^52) - 2^52
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| subsd xmm4, xmm3
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| orpd xmm4, xmm2 // Merge sign bit back in.
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| sseconst_1 xmm2, RDa
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| cmpsd xmm0, xmm4, 1 // x/y < result?
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| andpd xmm0, xmm2
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| subsd xmm4, xmm0 // If yes, subtract 1.0.
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| movaps xmm0, xmm5
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| mulsd xmm1, xmm4
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| subsd xmm0, xmm1
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| ret
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|1:
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| mulsd xmm1, xmm0
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| movaps xmm0, xmm5
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| subsd xmm0, xmm1
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| ret
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} else {
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|// Args/ret on x87 stack (y on top). No xmm registers modified.
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|// Caveat: needs 3 slots on x87 stack! RC (eax) modified!
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| fld st1
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| fdiv st1
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| fnstcw word [esp+4]
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| mov ax, 0x0400
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| or ax, [esp+4]
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| and ax, 0xf7ff
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| mov [esp+6], ax
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| fldcw word [esp+6]
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| frndint
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| fldcw word [esp+4]
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| fmulp st1
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| fsubp st1
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}
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| ret
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|
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|// FP exponentiation e^x and 2^x. Called by math.exp fast function and
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@ -2619,31 +2683,100 @@ static void build_subroutines(BuildCtx *ctx, int cmov)
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|// Compute x op y for basic arithmetic operators (+ - * / % ^ and unary -)
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|// and basic math functions. ORDER ARITH
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|->vm_foldarith:
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| mov eax, [esp+20]
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| fld qword [esp+4]
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| fld qword [esp+12]
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| cmp eax, 1; je >1; ja >2
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| faddp st1; ret
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|1: ; fsubp st1; ret
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|2: ; cmp eax, 3; je >1; ja >2
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| fmulp st1; ret
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|1: ; fdivp st1; ret
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|2: ; cmp eax, 5; jb ->vm_mod; je ->vm_pow
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| cmp eax, 7; je >1; ja >2
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| fpop; fchs; ret
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|1: ; fpop; fabs; ret
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|2: ; cmp eax, 9; je >1; ja >2
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| fpatan; ret
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|1: ; fxch; fscale; fpop1; ret
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|2: ; cmp eax, 11; je >1; ja >9
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||if (cmov) {
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| fucomi st1; fcmovnbe st1; fpop1; ret
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|1: ; fucomi st1; fcmovbe st1; fpop1; ret
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||} else {
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| fucom st1; fnstsw ax; test ah, 1; jz >2; fxch; 2: ; fpop; ret
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|1: ; fucom st1; fnstsw ax; test ah, 1; jnz >2; fxch; 2: ; fpop; ret
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||}
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|9: ; int3 // Bad op.
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if (sse) {
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|.macro retxmm0; .if X64; ret; .else; jmp >7; .endif; .endmacro
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|.macro retst0; .if X64; jmp >7; .else; ret; .endif; .endmacro
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|.if X64WIN
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| .define foldop, CARG3d
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|.elif X64
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| .define foldop, CARG1d
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|.else
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| .define foldop, eax
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| mov foldop, [esp+20]
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| movsd xmm0, qword [esp+4]
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| movsd xmm1, qword [esp+12]
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|.endif
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| cmp foldop, 1; je >1; ja >2
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| addsd xmm0, xmm1; retxmm0
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|1: ; subsd xmm0, xmm1; retxmm0
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|2: ; cmp foldop, 3; je >1; ja >2
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| mulsd xmm0, xmm1; retxmm0
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|1: ; divsd xmm0, xmm1; retxmm0
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|2: ; cmp foldop, 5
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|.if X64
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| jb ->vm_mod; je ->vm_pow // NYI: broken without SSE vm_pow.
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|.else
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| je >1; ja >2
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| call ->vm_mod; retxmm0
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|1: ; fld qword [esp+4]; fld qword [esp+12]; jmp ->vm_pow // NYI
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|2:
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|.endif
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| cmp foldop, 7; je >1; ja >2
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| sseconst_sign xmm1, RDa; xorps xmm0, xmm1; retxmm0
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|1:
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| sseconst_abs xmm1, RDa; andps xmm0, xmm1; retxmm0
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|2: ; cmp foldop, 9; ja >2
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|.if X64WIN
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| movsd qword [esp+8], xmm0 // Use scratch area.
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| movsd qword [esp+16], xmm1
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| fld qword [esp+8]
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| fld qword [esp+16]
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|.elif X64
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| movsd qword [esp-8], xmm0 // Use red zone.
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| movsd qword [esp-16], xmm1
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| fld qword [esp-8]
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| fld qword [esp-16]
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|.else
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| fld qword [esp+4] // Reload from stack
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| fld qword [esp+12]
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|.endif
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| je >1
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| fpatan; retst0
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|1: ; fxch; fscale; fpop1; retst0
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|2: ; cmp foldop, 11; je >1; ja >9
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| minsd xmm0, xmm1; retxmm0
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|1: ; maxsd xmm0, xmm1; retxmm0
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|9: ; int3 // Bad op.
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|7: // Move return value depending on calling convention.
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|.if X64WIN
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| fstp qword [esp+8] // Use scratch area.
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| movsd xmm0, qword [esp+8]
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|.elif X64
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| fstp qword [esp-8] // Use red zone.
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| movsd xmm0, qword [esp-8]
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|.else
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| movsd qword [esp+4], xmm0 // Overwrite callee-owned args.
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| fld qword [esp+4]
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|.endif
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| ret
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} else {
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| mov eax, [esp+20]
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| fld qword [esp+4]
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| fld qword [esp+12]
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| cmp eax, 1; je >1; ja >2
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| faddp st1; ret
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|1: ; fsubp st1; ret
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|2: ; cmp eax, 3; je >1; ja >2
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| fmulp st1; ret
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|1: ; fdivp st1; ret
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|2: ; cmp eax, 5; jb ->vm_mod; je ->vm_pow
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| cmp eax, 7; je >1; ja >2
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| fpop; fchs; ret
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|1: ; fpop; fabs; ret
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|2: ; cmp eax, 9; je >1; ja >2
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| fpatan; ret
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|1: ; fxch; fscale; fpop1; ret
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|2: ; cmp eax, 11; je >1; ja >9
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||if (cmov) {
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| fucomi st1; fcmovnbe st1; fpop1; ret
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|1: ; fucomi st1; fcmovbe st1; fpop1; ret
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||} else {
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| fucom st1; fnstsw ax; test ah, 1; jz >2; fxch; 2: ; fpop; ret
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|1: ; fucom st1; fnstsw ax; test ah, 1; jnz >2; fxch; 2: ; fpop; ret
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||}
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|9: ; int3 // Bad op.
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}
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|//-----------------------------------------------------------------------
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|//-- Miscellaneous functions --------------------------------------------
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@ -2694,7 +2827,7 @@ static void build_subroutines(BuildCtx *ctx, int cmov)
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}
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/* Generate the code for a single instruction. */
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static void build_ins(BuildCtx *ctx, BCOp op, int defop, int cmov)
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static void build_ins(BuildCtx *ctx, BCOp op, int defop, int cmov, int sse)
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{
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int vk = 0;
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|// Note: aligning all instructions does not pay off.
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@ -2711,10 +2844,16 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop, int cmov)
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| ins_AD
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| checknum RA, ->vmeta_comp
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| checknum RD, ->vmeta_comp
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| fld qword [BASE+RA*8] // Reverse order, i.e like cmp D, A.
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| fld qword [BASE+RD*8]
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| add PC, 4
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| fcomparepp // eax (RD) modified!
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if (sse) {
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| movsd xmm0, qword [BASE+RD*8]
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| add PC, 4
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| ucomisd xmm0, qword [BASE+RA*8]
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} else {
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| fld qword [BASE+RA*8] // Reverse order, i.e like cmp D, A.
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| fld qword [BASE+RD*8]
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| add PC, 4
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| fcomparepp // eax (RD) modified!
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}
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| // Unordered: all of ZF CF PF set, ordered: PF clear.
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| // To preserve NaN semantics GE/GT branch on unordered, but LT/LE don't.
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switch (op) {
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@ -2746,9 +2885,14 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop, int cmov)
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| add PC, 4
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| cmp RB, LJ_TISNUM; ja >5
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| checknum RA, >5
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| fld qword [BASE+RA*8]
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| fld qword [BASE+RD*8]
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| fcomparepp // eax (RD) modified!
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if (sse) {
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| movsd xmm0, qword [BASE+RD*8]
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| ucomisd xmm0, qword [BASE+RA*8]
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} else {
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| fld qword [BASE+RA*8]
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| fld qword [BASE+RD*8]
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| fcomparepp // eax (RD) modified!
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}
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iseqne_fp:
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if (vk) {
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| jp >2 // Unordered means not equal.
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@ -2820,9 +2964,14 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop, int cmov)
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| ins_AD // RA = src, RD = num const, JMP with RD = target
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| add PC, 4
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| checknum RA, >2
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| fld qword [BASE+RA*8]
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| fld qword [KBASE+RD*8]
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| fcomparepp // eax (RD) modified!
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if (sse) {
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| movsd xmm0, qword [KBASE+RD*8]
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| ucomisd xmm0, qword [BASE+RA*8]
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} else {
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| fld qword [BASE+RA*8]
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| fld qword [KBASE+RD*8]
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| fcomparepp // eax (RD) modified!
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}
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goto iseqne_fp;
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case BC_ISEQP: case BC_ISNEP:
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vk = op == BC_ISEQP;
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@ -2875,18 +3024,32 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop, int cmov)
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case BC_UNM:
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| ins_AD // RA = dst, RD = src
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| checknum RD, ->vmeta_unm
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| fld qword [BASE+RD*8]
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| fchs
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| fstp qword [BASE+RA*8]
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if (sse) {
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| movsd xmm0, qword [BASE+RD*8]
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| sseconst_sign xmm1, RDa
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| xorps xmm0, xmm1
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| movsd qword [BASE+RA*8], xmm0
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} else {
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| fld qword [BASE+RD*8]
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| fchs
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| fstp qword [BASE+RA*8]
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}
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| ins_next
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break;
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case BC_LEN:
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| ins_AD // RA = dst, RD = src
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| checkstr RD, >2
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| mov STR:RD, [BASE+RD*8]
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| fild dword STR:RD->len
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|1:
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| fstp qword [BASE+RA*8]
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if (sse) {
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| xorps xmm0, xmm0
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| cvtsi2sd xmm0, dword STR:RD->len
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|1:
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| movsd qword [BASE+RA*8], xmm0
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} else {
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| fild dword STR:RD->len
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|1:
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| fstp qword [BASE+RA*8]
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}
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| ins_next
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|2:
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| checktab RD, ->vmeta_len
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@ -2894,72 +3057,108 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop, int cmov)
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| mov RB, BASE // Save BASE.
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| call extern lj_tab_len@4 // (GCtab *t)
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| // Length of table returned in eax (RC).
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| mov ARG1, RC
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| mov BASE, RB // Restore BASE.
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| fild ARG1
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if (sse) {
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| cvtsi2sd xmm0, RC
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| mov BASE, RB // Restore BASE.
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} else {
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| mov ARG1, RC
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| mov BASE, RB // Restore BASE.
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| fild ARG1
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}
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| movzx RA, PC_RA
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| jmp <1
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break;
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/* -- Binary ops -------------------------------------------------------- */
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|.macro ins_arithpre, ins
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|.macro ins_arithpre, ins, sseins, ssereg
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| ins_ABC
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||vk = ((int)op - BC_ADDVN) / (BC_ADDNV-BC_ADDVN);
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||switch (vk) {
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||case 0:
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| checknum RB, ->vmeta_arith_vn
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||if (sse) {
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| movsd xmm0, qword [BASE+RB*8]
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| sseins ssereg, qword [KBASE+RC*8]
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||} else {
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| fld qword [BASE+RB*8]
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| ins qword [KBASE+RC*8]
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||}
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|| break;
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||case 1:
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| checknum RB, ->vmeta_arith_nv
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||if (sse) {
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| movsd xmm0, qword [KBASE+RC*8]
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| sseins ssereg, qword [BASE+RB*8]
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||} else {
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| fld qword [KBASE+RC*8]
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| ins qword [BASE+RB*8]
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||}
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|| break;
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||default:
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| checknum RB, ->vmeta_arith_vv
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| checknum RC, ->vmeta_arith_vv
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||if (sse) {
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| movsd xmm0, qword [BASE+RB*8]
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| sseins ssereg, qword [BASE+RC*8]
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||} else {
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| fld qword [BASE+RB*8]
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| ins qword [BASE+RC*8]
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||}
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|| break;
|
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||}
|
||||
|.endmacro
|
||||
|
|
||||
|.macro ins_arith, ins
|
||||
| ins_arithpre ins
|
||||
|.macro ins_arithpost
|
||||
||if (sse) {
|
||||
| movsd qword [BASE+RA*8], xmm0
|
||||
||} else {
|
||||
| fstp qword [BASE+RA*8]
|
||||
||}
|
||||
|.endmacro
|
||||
|
|
||||
|.macro ins_arith, ins, sseins
|
||||
| ins_arithpre ins, sseins, xmm0
|
||||
| ins_arithpost
|
||||
| ins_next
|
||||
|.endmacro
|
||||
|
||||
| // RA = dst, RB = src1 or num const, RC = src2 or num const
|
||||
case BC_ADDVN: case BC_ADDNV: case BC_ADDVV:
|
||||
| ins_arith fadd
|
||||
| ins_arith fadd, addsd
|
||||
break;
|
||||
case BC_SUBVN: case BC_SUBNV: case BC_SUBVV:
|
||||
| ins_arith fsub
|
||||
| ins_arith fsub, subsd
|
||||
break;
|
||||
case BC_MULVN: case BC_MULNV: case BC_MULVV:
|
||||
| ins_arith fmul
|
||||
| ins_arith fmul, mulsd
|
||||
break;
|
||||
case BC_DIVVN: case BC_DIVNV: case BC_DIVVV:
|
||||
| ins_arith fdiv
|
||||
| ins_arith fdiv, divsd
|
||||
break;
|
||||
case BC_MODVN:
|
||||
| ins_arithpre fld
|
||||
| ins_arithpre fld, movsd, xmm1
|
||||
|->BC_MODVN_Z:
|
||||
| call ->vm_mod
|
||||
| fstp qword [BASE+RA*8]
|
||||
| ins_arithpost
|
||||
| ins_next
|
||||
break;
|
||||
case BC_MODNV: case BC_MODVV:
|
||||
| ins_arithpre fld
|
||||
| ins_arithpre fld, movsd, xmm1
|
||||
| jmp ->BC_MODVN_Z // Avoid 3 copies. It's slow anyway.
|
||||
break;
|
||||
case BC_POW:
|
||||
| ins_arithpre fld
|
||||
| call ->vm_pow
|
||||
| fstp qword [BASE+RA*8]
|
||||
if (sse) {
|
||||
sse = 0; /* NYI: temporary workaround. */
|
||||
| ins_arithpre fld, movsd, xmm1
|
||||
| call ->vm_pow
|
||||
| ins_arithpost
|
||||
sse = 1;
|
||||
} else {
|
||||
| ins_arithpre fld, movsd, xmm1
|
||||
| call ->vm_pow
|
||||
| ins_arithpost
|
||||
}
|
||||
| ins_next
|
||||
break;
|
||||
|
||||
@ -3945,17 +4144,21 @@ static int build_backend(BuildCtx *ctx)
|
||||
{
|
||||
int op;
|
||||
int cmov = 1;
|
||||
int sse = 0;
|
||||
#ifdef LUAJIT_CPU_NOCMOV
|
||||
cmov = 0;
|
||||
#endif
|
||||
#ifdef LUAJIT_CPU_SSE2
|
||||
sse = 1;
|
||||
#endif
|
||||
|
||||
dasm_growpc(Dst, BC__MAX);
|
||||
|
||||
build_subroutines(ctx, cmov);
|
||||
build_subroutines(ctx, cmov, sse);
|
||||
|
||||
|.code_op
|
||||
for (op = 0; op < BC__MAX; op++)
|
||||
build_ins(ctx, (BCOp)op, op, cmov);
|
||||
build_ins(ctx, (BCOp)op, op, cmov, sse);
|
||||
|
||||
return BC__MAX;
|
||||
}
|
||||
|
||||
1073
src/buildvm_x86.h
1073
src/buildvm_x86.h
File diff suppressed because it is too large
Load Diff
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Reference in New Issue
Block a user