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Implement debug.sethook().
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a9d61d0044
@ -272,7 +272,12 @@ enum { LJ_CONT_TAILCALL, LJ_CONT_FFI_CALLBACK }; /* Special continuations. */
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#define CFRAME_OFS_PC 168
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#define CFRAME_OFS_MULTRES 160
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#define CFRAME_SIZE 240
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#define CFRAME_SHIFT_MULTRES 3
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/*
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** TODO: it would be good if we always decoded param*8 like
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** the RISC architectures do. If so then SHIFT_MULTRES will
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** need to change to 3.
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*/
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#define CFRAME_SHIFT_MULTRES 0
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#else
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#error "Missing CFRAME_* definitions for this architecture"
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#endif
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@ -188,12 +188,12 @@
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|.macro ins_callt
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| // BASE = new base, RB = LFUNC, RD = nargs+1, -8(BASE) = PC
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| lg PC, LFUNC:RB->pc
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| llgf RA, 0(PC) // TODO: combine loads?
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| llgcr OP, RA
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| sllg TMPR1, OP, 3
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| llgc OP, 3(PC)
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| llgc RA, 2(PC)
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| sllg TMPR1, OP, 3
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| la PC, 4(PC)
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| lg TMPR1, 0(TMPR1, DISPATCH)
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| br TMPR1
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| lg TMPR1, 0(TMPR1, DISPATCH)
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| br TMPR1
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|.endmacro
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|.macro ins_call
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@ -2044,8 +2044,35 @@ static void build_subroutines(BuildCtx *ctx)
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| stg r0, 0
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|->vm_inshook: // Dispatch target for instr/line hooks.
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| stg r0, 0
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| stg r0, 0
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| llgc RD, (DISPATCH_GL(hookmask))(DISPATCH)
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| tmll RD, HOOK_ACTIVE // Hook already active?
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| jne >5
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| tmll RD, LUA_MASKLINE|LUA_MASKCOUNT
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| je >5
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| ly TMPR2, (DISPATCH_GL(hookcount))(DISPATCH)
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| ahi TMPR2, -1
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| sty TMPR2, (DISPATCH_GL(hookcount))(DISPATCH)
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| je >1
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| tmll RD, LUA_MASKLINE
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| je >5
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|1:
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| lg L:RB, SAVE_L
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| stg BASE, L:RB->base
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| lgr CARG2, PC
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| lgr CARG1, L:RB
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| // SAVE_PC must hold the _previous_ PC. The callee updates it with PC.
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| brasl r14, extern lj_dispatch_ins // (lua_State *L, const BCIns *pc)
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|3:
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| lg BASE, L:RB->base
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|4:
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| llgc RA, PC_RA
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|5:
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| llgc OP, PC_OP
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| sllg TMPR1, OP, 3
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| llgh RD, PC_RD
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| lg TMPR1, GG_DISP2STATIC(TMPR1, DISPATCH)
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| br TMPR1
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|->cont_hook: // Continue from hook yield.
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| stg r0, 0
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@ -2056,12 +2083,40 @@ static void build_subroutines(BuildCtx *ctx)
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| stg r0, 0
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|->vm_callhook: // Dispatch target for call hooks.
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| stg r0, 0
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| stg r0, 0
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| stg PC, SAVE_PC
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|.if JIT
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| j >1
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|.endif
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|->vm_hotcall: // Hot call counter underflow.
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| stg r0, 0
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| stg r0, 0
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|.if JIT
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| stg PC, SAVE_PC
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| oill PC, 1 // Marker for hot call.
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|1:
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|.endif
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| sllg RD, NARGS:RD, 3
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| lay RD, -8(RD, BASE)
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| lg L:RB, SAVE_L
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| stg BASE, L:RB->base
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| stg RD, L:RB->top
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| lgr CARG2, PC
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| lgr CARG1, L:RB
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| brasl r14, extern lj_dispatch_call // (lua_State *L, const BCIns *pc)
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| // ASMFunction returned in r2 (CRET1).
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| lghi TMPR2, 0
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| stg TMPR2, SAVE_PC // Invalidate for subsequent line hook.
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|.if JIT
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| nill PC, -2
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|.endif
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| lg BASE, L:RB->base
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| lg RD, L:RB->top
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| sgr RD, BASE
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| lgr RB, CRET1
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| llgc RA, PC_RA
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| srl RD, 3
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| ahi NARGS:RD, 1
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| llgfr RD, RD
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| br RB
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|->cont_stitch: // Trace stitching.
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| stg r0, 0
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@ -3422,7 +3477,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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| agf NARGS:RD, SAVE_MULTRES
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}
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| sllg RA, RA, 3
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| lg LFUNC:RB, 0(BASE, RA)
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| lg LFUNC:RB, 0(RA, BASE)
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| checkfunc LFUNC:RB, ->vmeta_call_ra
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| la BASE, 16(RA, BASE)
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| ins_call
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@ -3659,7 +3714,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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| lgr CARG1, L:RB
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| brasl r14, extern lj_state_growstack // (lua_State *L, int n)
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| lg BASE, L:RB->base
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| llgf TMPR1, TMP_STACK_HI
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| lgf TMPR1, TMP_STACK_HI
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| lg RA, L:RB->top
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| agr TMPR1, BASE
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| j <6
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