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https://github.com/LuaJIT/LuaJIT.git
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LoongArch64: Add definitions for target CPU
Co-developed-by: Qiqi Huang <huangqiqi@loongson.cn>
This commit is contained in:
Xiaolin Zhao
parent
6ee7bd74d4
commit
9ef79d869c
@ -55,7 +55,7 @@ typedef uint32_t RegSP;
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/* Bitset for registers. 32 registers suffice for most architectures.
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** Note that one set holds bits for both GPRs and FPRs.
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*/
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#if LJ_TARGET_PPC || LJ_TARGET_MIPS || LJ_TARGET_ARM64
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#if LJ_TARGET_PPC || LJ_TARGET_MIPS || LJ_TARGET_ARM64 || LJ_TARGET_LOONGARCH64
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typedef uint64_t RegSet;
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#else
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typedef uint32_t RegSet;
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@ -69,7 +69,7 @@ typedef uint32_t RegSet;
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#define rset_set(rs, r) (rs |= RID2RSET(r))
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#define rset_clear(rs, r) (rs &= ~RID2RSET(r))
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#define rset_exclude(rs, r) (rs & ~RID2RSET(r))
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#if LJ_TARGET_PPC || LJ_TARGET_MIPS || LJ_TARGET_ARM64
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#if LJ_TARGET_PPC || LJ_TARGET_MIPS || LJ_TARGET_ARM64 || LJ_TARGET_LOONGARCH64
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#define rset_picktop(rs) ((Reg)(__builtin_clzll(rs)^63))
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#define rset_pickbot(rs) ((Reg)__builtin_ctzll(rs))
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#else
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@ -144,6 +144,8 @@ typedef uint32_t RegCost;
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#include "lj_target_ppc.h"
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#elif LJ_TARGET_MIPS
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#include "lj_target_mips.h"
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#elif LJ_TARGET_LOONGARCH64
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#include "lj_target_loongarch64.h"
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#else
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#error "Missing include for target CPU"
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#endif
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313
src/lj_target_loongarch64.h
Normal file
313
src/lj_target_loongarch64.h
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@ -0,0 +1,313 @@
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/*
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** Definitions for LoongArch CPUs.
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** Copyright (C) 2005-2022 Mike Pall. See Copyright Notice in luajit.h
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*/
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#ifndef _LJ_TARGET_LOONGARCH_H
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#define _LJ_TARGET_LOONGARCH_H
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/* -- Registers IDs ------------------------------------------------------- */
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#define GPRDEF(_) \
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_(R0) _(RA) _(R2) _(SP) _(R4) _(R5) _(R6) _(R7) \
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_(R8) _(R9) _(R10) _(R11) _(R12) _(R13) _(R14) _(R15) \
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_(R16) _(R17) _(R18) _(R19) _(R20) _(X) _(R22) _(R23) \
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_(R24) _(R25) _(R26) _(R27) _(R28) _(R29) _(R30) _(R31)
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#define FPRDEF(_) \
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_(F0) _(F1) _(F2) _(F3) _(F4) _(F5) _(F6) _(F7) \
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_(F8) _(F9) _(F10) _(F11) _(F12) _(F13) _(F14) _(F15) \
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_(F16) _(F17) _(F18) _(F19) _(F20) _(F21) _(F22) _(F23) \
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_(F24) _(F25) _(F26) _(F27) _(F28) _(F29) _(F30) _(F31)
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#define VRIDDEF(_)
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#define RIDENUM(name) RID_##name,
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enum {
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GPRDEF(RIDENUM) /* General-purpose registers (GPRs). */
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FPRDEF(RIDENUM) /* Floating-point registers (FPRs). */
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RID_MAX,
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RID_ZERO = RID_R0,
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RID_TMP = RID_RA,
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/* Calling conventions. */
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RID_RET = RID_R4,
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RID_RETHI = RID_R5,
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RID_RETLO = RID_R4,
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RID_FPRET = RID_F0,
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/* These definitions must match with the *.dasc file(s): */
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RID_BASE = RID_R23, /* Interpreter BASE. */
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RID_LPC = RID_R25, /* Interpreter PC. */
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RID_DISPATCH = RID_R26, /* Interpreter DISPATCH table. */
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RID_LREG = RID_R27, /* Interpreter L. */
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RID_JGL = RID_R22, /* On-trace: global_State + 32768. */
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/* Register ranges [min, max) and number of registers. */
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RID_MIN_GPR = RID_R0,
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RID_MAX_GPR = RID_R31+1,
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RID_MIN_FPR = RID_MAX_GPR,
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RID_MAX_FPR = RID_F31+1,
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RID_NUM_GPR = RID_MAX_GPR - RID_MIN_GPR,
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RID_NUM_FPR = RID_MAX_FPR - RID_MIN_FPR
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};
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#define RID_NUM_KREF RID_NUM_GPR
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#define RID_MIN_KREF RID_R0
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/* -- Register sets ------------------------------------------------------- */
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/* Make use of all registers, except ZERO, TMP, R2, SP, JGL, R20 and X. */
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#define RSET_FIXED \
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(RID2RSET(RID_ZERO)|RID2RSET(RID_TMP)|RID2RSET(RID_R2)|\
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RID2RSET(RID_SP)|RID2RSET(RID_JGL)|RID2RSET(RID_R20)|\
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RID2RSET(RID_X))
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#define RSET_GPR (RSET_RANGE(RID_MIN_GPR, RID_MAX_GPR) - RSET_FIXED)
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#define RSET_FPR RSET_RANGE(RID_MIN_FPR, RID_MAX_FPR)
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#define RSET_ALL (RSET_GPR|RSET_FPR)
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#define RSET_INIT RSET_ALL
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/* scratch register. */
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#define RSET_SCRATCH_GPR RSET_RANGE(RID_R4, RID_R19+1)
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#define RSET_SCRATCH_FPR RSET_RANGE(RID_F0, RID_F23+1)
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#define RSET_SCRATCH (RSET_SCRATCH_GPR|RSET_SCRATCH_FPR)
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#define REGARG_FIRSTGPR RID_R4
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#define REGARG_LASTGPR RID_R11
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#define REGARG_NUMGPR 8
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#define REGARG_FIRSTFPR RID_F0
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#define REGARG_LASTFPR RID_F7
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#define REGARG_NUMFPR 8
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/* -- Spill slots --------------------------------------------------------- */
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/* Spill slots are 32 bit wide. An even/odd pair is used for FPRs.
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**
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** SPS_FIXED: Available fixed spill slots in interpreter frame.
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** This definition must match with the *.dasc file(s).
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**
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** SPS_FIRST: First spill slot for general use.
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*/
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#define SPS_FIXED 4
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#define SPS_FIRST 4
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#define SPOFS_TMP 0
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#define sps_scale(slot) (4 * (int32_t)(slot))
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#define sps_align(slot) (((slot) - SPS_FIXED + 3) & ~3)
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/* -- Exit state ---------------------------------------------------------- */
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/* This definition must match with the *.dasc file(s). */
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typedef struct {
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lua_Number fpr[RID_NUM_FPR]; /* Floating-point registers. */
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intptr_t gpr[RID_NUM_GPR]; /* General-purpose registers. */
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int32_t spill[256]; /* Spill slots. */
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} ExitState;
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/* Highest exit + 1 indicates stack check. */
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#define EXITSTATE_CHECKEXIT 1
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/* Return the address of a per-trace exit stub. */
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static LJ_AINLINE uint32_t *exitstub_trace_addr_(uint32_t *p)
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{
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while (*p == 0x03400000) p++; /* Skip LOONGI_NOP. */
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return p;
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}
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/* Avoid dependence on lj_jit.h if only including lj_target.h. */
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#define exitstub_trace_addr(T, exitno) \
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exitstub_trace_addr_((MCode *)((char *)(T)->mcode + (T)->szmcode))
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/* -- Instructions -------------------------------------------------------- */
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/* Instruction fields. */
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#define LOONGF_D(r) (r)
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#define LOONGF_J(r) ((r) << 5)
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#define LOONGF_K(r) ((r) << 10)
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#define LOONGF_A(r) ((r) << 15)
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#define LOONGF_I(n) ((n) << 10)
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#define LOONGF_I20(n) ((n) << 5)
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#define LOONGF_M(n) ((n) << 16)
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/* Check for valid field range. */
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#define LOONGF_S_OK(x, b) ((((x) + (1 << (b-1))) >> (b)) == 0)
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typedef enum LOONGIns {
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/* Integer instructions. */
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LOONGI_MOVE = 0x00150000,
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LOONGI_NOP = 0x03400000,
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LOONGI_AND = 0x00148000,
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LOONGI_ANDI = 0x03400000,
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LOONGI_OR = 0x00150000,
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LOONGI_ORI = 0x03800000,
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LOONGI_XOR = 0x00158000,
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LOONGI_XORI = 0x03c00000,
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LOONGI_NOR = 0x00140000,
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LOONGI_SLT = 0x00120000,
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LOONGI_SLTU = 0x00128000,
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LOONGI_SLTI = 0x02000000,
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LOONGI_SLTUI = 0x02400000,
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LOONGI_ADD_W = 0x00100000,
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LOONGI_ADDI_W = 0x02800000,
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LOONGI_SUB_W = 0x00110000,
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LOONGI_MUL_W = 0x001c0000,
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LOONGI_MULH_W = 0x001c8000,
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LOONGI_DIV_W = 0x00200000,
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LOONGI_DIV_WU = 0x00210000,
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LOONGI_SLLI_W = 0x00408000,
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LOONGI_SRLI_W = 0x00448000,
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LOONGI_SRAI_W = 0x00488000,
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LOONGI_ROTRI_W = 0x004c8000,
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LOONGI_ROTRI_D = 0x004d0000,
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LOONGI_SLL_W = 0x00170000,
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LOONGI_SRL_W = 0x00178000,
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LOONGI_SRA_W = 0x00180000,
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LOONGI_ROTR_W = 0x001b0000,
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LOONGI_ROTR_D = 0x001b8000,
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LOONGI_EXT_W_B = 0x00005c00,
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LOONGI_EXT_W_H = 0x00005800,
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LOONGI_REVB_2H = 0x00003000,
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LOONGI_REVB_4H = 0x00003400,
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LOONGI_ALSL_W = 0x00040000,
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LOONGI_ALSL_D = 0x002c0000,
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LOONGI_B = 0x50000000,
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LOONGI_BL = 0x54000000,
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LOONGI_JIRL = 0x4c000000,
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LOONGI_BEQ = 0x58000000,
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LOONGI_BNE = 0x5c000000,
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LOONGI_BLT = 0x60000000,
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LOONGI_BGE = 0x64000000,
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LOONGI_BGEU = 0x6c000000,
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LOONGI_BLTU = 0x68000000,
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LOONGI_BCEQZ = 0x48000000,
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LOONGI_BCNEZ = 0x48000100,
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/* Load/store instructions. */
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LOONGI_LD_W = 0x28800000,
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LOONGI_LD_D = 0x28c00000,
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LOONGI_ST_W = 0x29800000,
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LOONGI_ST_D = 0x29c00000,
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LOONGI_LD_B = 0x28000000,
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LOONGI_ST_B = 0x29000000,
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LOONGI_LD_H = 0x28400000,
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LOONGI_ST_H = 0x29400000,
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LOONGI_LD_BU = 0x2a000000,
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LOONGI_LD_HU = 0x2a400000,
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LOONGI_LDX_B = 0x38000000,
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LOONGI_LDX_BU = 0x38200000,
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LOONGI_LDX_H = 0x38040000,
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LOONGI_LDX_HU = 0x38240000,
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LOONGI_LDX_D = 0x380c0000,
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LOONGI_STX_D = 0x381c0000,
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LOONGI_LDX_W = 0x38080000,
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LOONGI_STX_W = 0x38180000,
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LOONGI_STX_B = 0x38100000,
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LOONGI_STX_H = 0x38140000,
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LOONGI_FLD_S = 0x2b000000,
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LOONGI_FST_S = 0x2b400000,
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LOONGI_FLD_D = 0x2b800000,
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LOONGI_FST_D = 0x2bc00000,
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LOONGI_FLDX_D = 0x38340000,
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LOONGI_FLDX_S = 0x38300000,
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LOONGI_FSTX_D = 0x383c0000,
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LOONGI_FSTX_S = 0x38380000,
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LOONGI_ADD_D = 0x00108000,
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LOONGI_ADDI_D = 0x02c00000,
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LOONGI_ADDU16I_D = 0x10000000,
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LOONGI_LU12I_W = 0x14000000,
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LOONGI_LU32I_D = 0x16000000,
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LOONGI_LU52I_D = 0x3000000,
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LOONGI_SUB_D = 0x00118000,
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LOONGI_DIV_D = 0x00220000,
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LOONGI_DIV_DU = 0x00230000,
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LOONGI_MUL_D = 0x001d8000,
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LOONGI_SLLI_D = 0x00410000,
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LOONGI_SRLI_D = 0x00450000,
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LOONGI_SLL_D = 0x00188000,
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LOONGI_SRL_D = 0x00190000,
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LOONGI_SRAI_D = 0x00490000,
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LOONGI_SRA_D = 0x00198000,
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LOONGI_REVH_D = 0x00004400,
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/* Extract/insert instructions. */
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LOONGI_BSTRPICK_D = 0x00c00000,
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LOONGI_BSTRINS_D = 0x00800000,
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LOONGI_MASKEQZ = 0x00130000,
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LOONGI_MASKNEZ = 0x00138000,
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/* FP instructions. */
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LOONGI_FRINT_S = 0x011e4400,
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LOONGI_FRINT_D = 0x011e4800,
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LOONGI_FTINTRM_L_D = 0x011a2800,
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LOONGI_FTINTRP_L_D = 0x011a6800,
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LOONGI_FTINTRNE_L_D = 0x011ae800,
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LOONGI_FMOV_S = 0x01149400,
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LOONGI_FMOV_D = 0x01149800,
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LOONGI_FABS_D = 0x01140800,
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LOONGI_FNEG_D = 0x01141800,
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LOONGI_FADD_D = 0x01010000,
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LOONGI_FSUB_D = 0x01030000,
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LOONGI_FMUL_D = 0x01050000,
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LOONGI_FDIV_D = 0x01070000,
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LOONGI_FSQRT_D = 0x01144800,
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LOONGI_FMIN_D = 0x010b0000,
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LOONGI_FMAX_D = 0x01090000,
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LOONGI_FADD_S = 0x01008000,
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LOONGI_FSUB_S = 0x01028000,
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LOONGI_FMADD_S = 0x08100000,
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LOONGI_FMADD_D = 0x08200000,
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LOONGI_FNMADD_D = 0x08a00000,
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LOONGI_FMSUB_S = 0x08500000,
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LOONGI_FMSUB_D = 0x08600000,
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LOONGI_FNMSUB_D = 0x08e00000,
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LOONGI_FCVT_D_S = 0x01192400,
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LOONGI_FTINT_W_S = 0x011b0400,
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LOONGI_FCVT_S_D = 0x01191800,
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LOONGI_FTINT_W_D = 0x011b0800,
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LOONGI_FFINT_S_W = 0x011d1000,
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LOONGI_FFINT_D_W = 0x011d2000,
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LOONGI_FFINT_S_L = 0x011d1800,
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LOONGI_FFINT_D_L = 0x011d2800,
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LOONGI_FTINTRZ_W_S = 0x011a8400,
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LOONGI_FTINTRZ_W_D = 0x011a8800,
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LOONGI_FTINTRZ_L_S = 0x011aa400,
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LOONGI_FTINTRZ_L_D = 0x011aa800,
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LOONGI_FTINTRM_W_S = 0x011a0400,
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LOONGI_FTINTRM_W_D = 0x011a0800,
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LOONGI_MOVFR2GR_S = 0x0114b400,
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LOONGI_MOVGR2FR_W = 0x0114a400,
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LOONGI_MOVGR2FR_D = 0x0114a800,
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LOONGI_MOVFR2GR_D = 0x0114b800,
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LOONGI_FCMP_CEQ_D = 0x0c220000,
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LOONGI_FCMP_CLT_S = 0x0c110000,
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LOONGI_FCMP_CLT_D = 0x0c210000,
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LOONGI_FCMP_CLE_D = 0x0c230000,
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LOONGI_FCMP_CULE_D = 0x0c270000,
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LOONGI_FCMP_CULT_D = 0x0c250000,
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LOONGI_FCMP_CNE_D = 0x0c280000,
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LOONGI_FSEL = 0x0d000000,
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} LOONGIns;
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#endif
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