From 9cb5046c3fe8da1437ec8f3bb682930b3692ba0c Mon Sep 17 00:00:00 2001
From: Mike Pall <mike>
Date: Fri, 27 Aug 2010 18:32:24 +0200
Subject: [PATCH] PPC: Add stack frame layout for PPCSPE target.

PPCSPE target compiles now, but will trap for any NYI parts.
Cross-compilation instructions:
  make HOST_CC="gcc -m32" CROSS=powerpc-e500v2-linux-gnuspe- TARGET=ppcspe
---
 doc/install.html     |  2 +-
 src/Makefile         |  5 ++--
 src/buildvm_ppc.dasc | 56 ++++++++++++++++++++++++++++++++++++++++++++
 src/lj_frame.h       |  9 +++++++
 4 files changed, 69 insertions(+), 3 deletions(-)

diff --git a/doc/install.html b/doc/install.html
index 6e328b79..45925e7a 100644
--- a/doc/install.html
+++ b/doc/install.html
@@ -301,7 +301,7 @@ You can cross-compile for a Windows target on Debian/Ubuntu by
 installing the <tt>mingw32</tt> package and running:
 </p>
 <pre class="code">
-make CC="gcc -m32" CROSS=i586-mingw32msvc- TARGET_SYS=Windows
+make HOST_CC="gcc -m32" CROSS=i586-mingw32msvc- TARGET_SYS=Windows
 </pre>
 
 <h2>Embedding LuaJIT</h2>
diff --git a/src/Makefile b/src/Makefile
index ed1be4ba..ea96e91e 100644
--- a/src/Makefile
+++ b/src/Makefile
@@ -130,8 +130,9 @@ BUILDMODE= mixed
 #   LIBS     HOST_LIBS     TARGET_LIBS
 #   CROSS    HOST_SYS      TARGET_SYS
 #
-# Cross-compilation example:
-#   make CC="gcc -m32" CROSS=i586-mingw32msvc- TARGET_SYS=Windows
+# Cross-compilation examples:
+#   make HOST_CC="gcc -m32" CROSS=i586-mingw32msvc- TARGET_SYS=Windows
+#   make HOST_CC="gcc -m32" CROSS=powerpc-e500v2-linux-gnuspe- TARGET=ppcspe
 
 CCOPTIONS= $(CCDEBUG) $(CCOPT) $(CCWARN) $(XCFLAGS) $(CFLAGS)
 LDOPTIONS= $(CCDEBUG) $(LDFLAGS)
diff --git a/src/buildvm_ppc.dasc b/src/buildvm_ppc.dasc
index 0e83e305..c2363d97 100644
--- a/src/buildvm_ppc.dasc
+++ b/src/buildvm_ppc.dasc
@@ -16,6 +16,62 @@
 |
 |//-----------------------------------------------------------------------
 |
+|// Stack layout while in interpreter. Must match with lj_frame.h.
+|.if SPE
+|.define SAVE_LR,	180(sp)
+|.define CFRAME_SPACE,	176	// Delta for sp.
+|// Back chain for sp:	176(sp)	<-- sp entering interpreter
+|.define SAVE_r31,	168(sp)	// 64 bit register saves.
+|.define SAVE_r30,	160(sp)
+|.define SAVE_r29,	152(sp)
+|.define SAVE_r28,	144(sp)
+|.define SAVE_r27,	136(sp)
+|.define SAVE_r26,	128(sp)
+|.define SAVE_r25,	120(sp)
+|.define SAVE_r24,	112(sp)
+|.define SAVE_r23,	104(sp)
+|.define SAVE_r22,	96(sp)
+|.define SAVE_r21,	88(sp)
+|.define SAVE_r20,	80(sp)
+|.define SAVE_r19,	72(sp)
+|.define SAVE_r18,	64(sp)
+|.define SAVE_r17,	56(sp)
+|.define SAVE_r16,	48(sp)
+|.define SAVE_r15,	40(sp)
+|.define SAVE_r14,	32(sp)
+|.define SAVE_ERRF,	28(sp)	// 32 bit C frame info.
+|.define SAVE_NRES,	24(sp)
+|.define SAVE_CFRAME,	20(sp)
+|.define SAVE_L,	16(sp)
+|.define SAVE_PC,	12(sp)
+|.define SAVE_MULTRES,	8(sp)
+|// Next frame lr:	4(sp)
+|// Back chain for sp:	0(sp)	<-- sp while in interpreter
+|
+|.macro save_, reg; evstdd reg, SAVE_..reg; .endmacro
+|.macro rest_, reg; evldd reg, SAVE_..reg; .endmacro
+|.endif
+|
+|.macro saveregs
+|  stwu sp, -CFRAME_SPACE(sp)
+|  save_ r14; save_ r15; save_ r16; save_ r17; save_ r18; save_ r19
+|  mflr r0
+|  save_ r20; save_ r21; save_ r22; save_ r23; save_ r24; save_ r25
+|  stw  r0, SAVE_LR
+|  save_ r26; save_ r27; save_ r28; save_ r29; save_ r30; save_ r31
+|.endmacro
+|
+|.macro restoreregs
+|  lwz r0, SAVE_LR
+|  rest_ r14; rest_ r15; rest_ r16; rest_ r17; rest_ r18; rest_ r19
+|  mtlr r0
+|  rest_ r20; rest_ r21; rest_ r22; rest_ r23; rest_ r24; rest_ r25
+|  rest_ r26; rest_ r27; rest_ r28; rest_ r29; rest_ r30; rest_ r31
+|  addi sp, sp, CFRAME_SPACE
+|.endmacro
+|
+|//-----------------------------------------------------------------------
+|
 |// Trap for not-yet-implemented parts.
 |.macro NYI; tw 4, sp, sp; .endmacro
 |
diff --git a/src/lj_frame.h b/src/lj_frame.h
index 549784c6..da33420b 100644
--- a/src/lj_frame.h
+++ b/src/lj_frame.h
@@ -87,6 +87,15 @@ enum {
 #define CFRAME_SIZE		(10*8)
 #define CFRAME_SIZE_JIT		(CFRAME_SIZE + 16)
 #endif
+#elif LJ_TARGET_PPCSPE
+#define CFRAME_OFS_ERRF		28
+#define CFRAME_OFS_NRES		24
+#define CFRAME_OFS_PREV		20
+#define CFRAME_OFS_L		16
+#define CFRAME_OFS_PC		12
+#define CFRAME_OFS_MULTRES	8
+#define CFRAME_SIZE		176
+#define CFRAME_SIZE_JIT		CFRAME_SIZE
 #else
 #error "Missing CFRAME_* definitions for this architecture"
 #endif