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riscv(interp): add VM builder support
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parent
83f3cc575e
commit
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@ -67,6 +67,8 @@ static int collect_reloc(BuildCtx *ctx, uint8_t *addr, int idx, int type);
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#include "../dynasm/dasm_ppc.h"
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#include "../dynasm/dasm_ppc.h"
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#elif LJ_TARGET_MIPS
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#elif LJ_TARGET_MIPS
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#include "../dynasm/dasm_mips.h"
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#include "../dynasm/dasm_mips.h"
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#elif LJ_TARGET_RISCV64
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#include "../dynasm/dasm_riscv.h"
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#else
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#else
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#error "No support for this architecture (yet)"
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#error "No support for this architecture (yet)"
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#endif
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#endif
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@ -156,6 +156,34 @@ static void emit_asm_wordreloc(BuildCtx *ctx, uint8_t *p, int n,
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"Error: unsupported opcode %08x for %s symbol relocation.\n",
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"Error: unsupported opcode %08x for %s symbol relocation.\n",
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ins, sym);
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ins, sym);
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exit(1);
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exit(1);
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#elif LJ_TARGET_RISCV64
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if ((ins & 0x7f) == 0x17u) {
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fprintf(ctx->fp, "\tauipc x%d, %s\n", (ins >> 7) & 31, sym);
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} else if ((ins & 0x7f) == 0x67u) {
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fprintf(ctx->fp, "\tjalr x%d, x%d, %s\n", (ins >> 7) & 31, (ins >> 15) & 31, sym);
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} else if ((ins & 0x7f) == 0x6fu) {
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fprintf(ctx->fp, "\tjal x%d, %s\n", (ins >> 7) & 31, sym);
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} else if ((ins & 0x7f) == 0x03u) {
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uint8_t funct3 = (ins >> 12) & 7;
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uint8_t rd = (ins >> 7) & 31, rs1 = (ins >> 15) & 31;
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switch (funct3) {
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case 0: fprintf(ctx->fp, "\tlb"); break;
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case 1: fprintf(ctx->fp, "\tlh"); break;
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case 2: fprintf(ctx->fp, "\tlw"); break;
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case 3: fprintf(ctx->fp, "\tld"); break;
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case 4: fprintf(ctx->fp, "\tlbu"); break;
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case 5: fprintf(ctx->fp, "\tlhu"); break;
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case 6: fprintf(ctx->fp, "\tlwu"); break;
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default: goto rv_reloc_err;
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}
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fprintf(ctx->fp, " x%d, %s(x%d)\n", rd, sym, rs1);
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} else {
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rv_reloc_err:
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fprintf(stderr,
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"Error: unsupported opcode %08x for %s symbol relocation.\n",
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ins, sym);
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exit(1);
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}
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#else
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#else
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#error "missing relocation support for this architecture"
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#error "missing relocation support for this architecture"
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#endif
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#endif
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@ -248,6 +276,9 @@ void emit_asm(BuildCtx *ctx)
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#endif
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#endif
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#if LJ_TARGET_MIPS
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#if LJ_TARGET_MIPS
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fprintf(ctx->fp, "\t.set nomips16\n\t.abicalls\n\t.set noreorder\n\t.set nomacro\n");
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fprintf(ctx->fp, "\t.set nomips16\n\t.abicalls\n\t.set noreorder\n\t.set nomacro\n");
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#endif
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#if LJ_TARGET_RISCV64
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fprintf(ctx->fp, ".option arch, -c\n.option norelax\n");
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#endif
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#endif
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emit_asm_align(ctx, 4);
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emit_asm_align(ctx, 4);
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