mirror of
https://github.com/LuaJIT/LuaJIT.git
synced 2025-02-08 15:34:09 +00:00
Rename TMPR2 as TMPR0.
TMPR2 was r0 and so cannot be used in address calculations (or shift values). Renaming it TMPR0 makes this more obvious.
This commit is contained in:
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70b5f6b966
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828bf84999
@ -64,9 +64,9 @@
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|.define CRET1, r2
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|.define CRET1, r2
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|.define OP, r2
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|.define TMPR0, r0
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|.define TMPR1, r1
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|.define TMPR1, r1
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|.define TMPR2, r0
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|.define OP, r2
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|// Stack layout while in interpreter. Must match with lj_frame.h.
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|// Stack layout while in interpreter. Must match with lj_frame.h.
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|.define CFRAME_SPACE, 240 // Delta for sp, 8 byte aligned.
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|.define CFRAME_SPACE, 240 // Delta for sp, 8 byte aligned.
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@ -272,10 +272,10 @@
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|.macro branchPC, reg
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|.macro branchPC, reg
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| // TODO: optimize this, was just lea PC, [PC+reg*4-BCBIAS_J*4].
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| // TODO: optimize this, was just lea PC, [PC+reg*4-BCBIAS_J*4].
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| // Can't clobber TMPR1 or condition code.
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| // Can't clobber TMPR1 or condition code.
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| lgr TMPR2, TMPR1 // Workaround because TMPR2 == r0 and can't be used in lay.
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| lgr TMPR0, TMPR1 // Workaround because TMPR0 == r0 and can't be used in lay.
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| sllg TMPR1, reg, 2
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| sllg TMPR1, reg, 2
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| lay PC, (-BCBIAS_J*4)(TMPR1, PC)
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| lay PC, (-BCBIAS_J*4)(TMPR1, PC)
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| lgr TMPR1, TMPR2
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| lgr TMPR1, TMPR0
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|.endmacro
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|.endmacro
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|// Set current VM state.
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|// Set current VM state.
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@ -574,8 +574,8 @@ static void build_subroutines(BuildCtx *ctx)
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| lg KBASE, L:RB->stack // Compute -savestack(L, L->top).
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| lg KBASE, L:RB->stack // Compute -savestack(L, L->top).
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| sg KBASE, L:RB->top
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| sg KBASE, L:RB->top
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| lg DISPATCH, L:RB->glref // Setup pointer to dispatch table.
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| lg DISPATCH, L:RB->glref // Setup pointer to dispatch table.
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| lghi TMPR2, 0
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| lghi TMPR0, 0
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| stg TMPR2, SAVE_ERRF // No error function.
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| stg TMPR0, SAVE_ERRF // No error function.
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| st KBASE, SAVE_NRES // Neg. delta means cframe w/o frame.
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| st KBASE, SAVE_NRES // Neg. delta means cframe w/o frame.
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| aghi DISPATCH, GG_G2DISP
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| aghi DISPATCH, GG_G2DISP
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| // Handler may change cframe_nres(L->cframe) or cframe_errfunc(L->cframe).
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| // Handler may change cframe_nres(L->cframe) or cframe_errfunc(L->cframe).
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@ -606,8 +606,8 @@ static void build_subroutines(BuildCtx *ctx)
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| lgr RB, BASE
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| lgr RB, BASE
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| sgr BASE, PC // Restore caller BASE.
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| sgr BASE, PC // Restore caller BASE.
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| sllg TMPR1, RD, 3
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| sllg TMPR1, RD, 3
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| lghi TMPR2, LJ_TNIL
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| lghi TMPR0, LJ_TNIL
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| stg TMPR2, -8(RA, TMPR1) // Ensure one valid arg.
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| stg TMPR0, -8(RA, TMPR1) // Ensure one valid arg.
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| lgr RC, RA // ... in [RC]
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| lgr RC, RA // ... in [RC]
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| lg PC, -24(RB) // Restore PC from [cont|PC].
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| lg PC, -24(RB) // Restore PC from [cont|PC].
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| lg RA, -32(RB)
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| lg RA, -32(RB)
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@ -645,8 +645,8 @@ static void build_subroutines(BuildCtx *ctx)
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| lg L:CARG1, SAVE_L
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| lg L:CARG1, SAVE_L
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| stg BASE, L:CARG1->base
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| stg BASE, L:CARG1->base
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| lgfr CARG3, RA // Caveat: RA == CARG3.
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| lgfr CARG3, RA // Caveat: RA == CARG3.
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| lg TMPR2, 0(RC)
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| lg TMPR0, 0(RC)
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| stg TMPR2, 0(RB)
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| stg TMPR0, 0(RB)
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| lgr CARG2, RB
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| lgr CARG2, RB
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| j ->BC_CAT_Z
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| j ->BC_CAT_Z
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@ -728,8 +728,8 @@ static void build_subroutines(BuildCtx *ctx)
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| settp STR:RC, LJ_TSTR // STR:RC = GCstr *
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| settp STR:RC, LJ_TSTR // STR:RC = GCstr *
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| stg STR:RC, TMP_STACK
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| stg STR:RC, TMP_STACK
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| la RC, TMP_STACK
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| la RC, TMP_STACK
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| llgc TMPR2, PC_OP
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| llgc TMPR0, PC_OP
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| cghi TMPR2, BC_GSET
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| cghi TMPR0, BC_GSET
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| jne >1
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| jne >1
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| settp TAB:RA, TAB:RB, LJ_TTAB // TAB:RB = GCtab *
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| settp TAB:RA, TAB:RB, LJ_TTAB // TAB:RB = GCtab *
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| lay RB, (DISPATCH_GL(tmptv))(DISPATCH) // Store fn->l.env in g->tmptv.
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| lay RB, (DISPATCH_GL(tmptv))(DISPATCH) // Store fn->l.env in g->tmptv.
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@ -835,16 +835,16 @@ static void build_subroutines(BuildCtx *ctx)
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| la PC, 4(PC)
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| la PC, 4(PC)
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| lg ITYPE, 0(RC)
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| lg ITYPE, 0(RC)
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| srag ITYPE, ITYPE, 47
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| srag ITYPE, ITYPE, 47
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| lghi TMPR2, LJ_TISTRUECOND
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| lghi TMPR0, LJ_TISTRUECOND
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| clr ITYPE, TMPR2 // Branch if result is true.
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| clr ITYPE, TMPR0 // Branch if result is true.
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| jl <5
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| jl <5
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| j <6
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| j <6
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|->cont_condf: // BASE = base, RC = result
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|->cont_condf: // BASE = base, RC = result
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| lg ITYPE, 0(RC)
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| lg ITYPE, 0(RC)
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| srag ITYPE, ITYPE, 47
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| srag ITYPE, ITYPE, 47
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| lghi TMPR2, LJ_TISTRUECOND
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| lghi TMPR0, LJ_TISTRUECOND
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| clr ITYPE, TMPR2 // Branch if result is false.
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| clr ITYPE, TMPR0 // Branch if result is false.
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| j <4
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| j <4
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|->vmeta_equal:
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|->vmeta_equal:
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@ -1041,8 +1041,8 @@ static void build_subroutines(BuildCtx *ctx)
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|.macro .ffunc_n, name, op
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|.macro .ffunc_n, name, op
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| .ffunc_1 name
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| .ffunc_1 name
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| lg TMPR2, 0(BASE)
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| lg TMPR0, 0(BASE)
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| checknumtp TMPR2, ->fff_fallback
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| checknumtp TMPR0, ->fff_fallback
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| op f0, 0(BASE) // TODO: might be better to unconditionally load into f1.
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| op f0, 0(BASE) // TODO: might be better to unconditionally load into f1.
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|.endmacro
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|.endmacro
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@ -1053,11 +1053,11 @@ static void build_subroutines(BuildCtx *ctx)
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|.macro .ffunc_nn, name
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|.macro .ffunc_nn, name
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| .ffunc_2 name
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| .ffunc_2 name
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| lg TMPR1, 0(BASE)
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| lg TMPR1, 0(BASE)
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| lg TMPR2, 8(BASE)
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| lg TMPR0, 8(BASE)
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| ld FARG1, 0(BASE)
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| ld FARG1, 0(BASE)
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| ld FARG2, 8(BASE)
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| ld FARG2, 8(BASE)
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| checknumtp TMPR1, ->fff_fallback
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| checknumtp TMPR1, ->fff_fallback
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| checknumtp TMPR2, ->fff_fallback
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| checknumtp TMPR0, ->fff_fallback
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|.endmacro
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|.endmacro
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|// Inlined GC threshold check. Caveat: uses label 1.
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|// Inlined GC threshold check. Caveat: uses label 1.
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@ -1099,8 +1099,8 @@ static void build_subroutines(BuildCtx *ctx)
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| jnl >1
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| jnl >1
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| lgr RC, RB
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| lgr RC, RB
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|1:
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|1:
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| lghi TMPR2, -1
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| lghi TMPR0, -1
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| xgr RC, TMPR2
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| xgr RC, TMPR0
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|2:
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|2:
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| lg CFUNC:RB, -16(BASE)
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| lg CFUNC:RB, -16(BASE)
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| cleartp CFUNC:RB
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| cleartp CFUNC:RB
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@ -1120,8 +1120,8 @@ static void build_subroutines(BuildCtx *ctx)
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|1: // Field metatable must be at same offset for GCtab and GCudata!
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|1: // Field metatable must be at same offset for GCtab and GCudata!
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| lg TAB:RB, TAB:RB->metatable
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| lg TAB:RB, TAB:RB->metatable
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|2:
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|2:
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| lghi TMPR2, LJ_TNIL
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| lghi TMPR0, LJ_TNIL
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| stg TMPR2, -16(BASE)
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| stg TMPR0, -16(BASE)
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| cghi TAB:RB, 0
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| cghi TAB:RB, 0
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| je ->fff_res1
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| je ->fff_res1
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| settp TAB:RC, TAB:RB, LJ_TTAB
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| settp TAB:RC, TAB:RB, LJ_TTAB
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@ -1150,8 +1150,8 @@ static void build_subroutines(BuildCtx *ctx)
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| clfi ITYPE, LJ_TISNUM; jh >7
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| clfi ITYPE, LJ_TISNUM; jh >7
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| lhi ITYPE, LJ_TISNUM
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| lhi ITYPE, LJ_TISNUM
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|7:
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|7:
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| lhi TMPR2, -1
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| lhi TMPR0, -1
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| xr ITYPE, TMPR2 // not ITYPE
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| xr ITYPE, TMPR0 // not ITYPE
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| llgfr ITYPE, ITYPE
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| llgfr ITYPE, ITYPE
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| sllg ITYPE, ITYPE, 3
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| sllg ITYPE, ITYPE, 3
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| lg TAB:RB, (DISPATCH_GL(gcroot[GCROOT_BASEMT]))(ITYPE, DISPATCH)
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| lg TAB:RB, (DISPATCH_GL(gcroot[GCROOT_BASEMT]))(ITYPE, DISPATCH)
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@ -1162,8 +1162,8 @@ static void build_subroutines(BuildCtx *ctx)
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| lgr TAB:TMPR1, TAB:RB
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| lgr TAB:TMPR1, TAB:RB
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| checktab TAB:RB, ->fff_fallback
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| checktab TAB:RB, ->fff_fallback
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| // Fast path: no mt for table yet and not clearing the mt.
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| // Fast path: no mt for table yet and not clearing the mt.
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| lghi TMPR2, 0
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| lghi TMPR0, 0
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| cg TMPR2, TAB:RB->metatable; jne ->fff_fallback
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| cg TMPR0, TAB:RB->metatable; jne ->fff_fallback
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| lg TAB:RA, 8(BASE)
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| lg TAB:RA, 8(BASE)
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| checktab TAB:RA, ->fff_fallback
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| checktab TAB:RA, ->fff_fallback
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| stg TAB:RA, TAB:RB->metatable
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| stg TAB:RA, TAB:RB->metatable
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@ -1213,8 +1213,8 @@ static void build_subroutines(BuildCtx *ctx)
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| j ->fff_res1
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| j ->fff_res1
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|3: // Handle numbers inline, unless a number base metatable is present.
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|3: // Handle numbers inline, unless a number base metatable is present.
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| clfi ITYPE, LJ_TISNUM; jh ->fff_fallback_1
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| clfi ITYPE, LJ_TISNUM; jh ->fff_fallback_1
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| lghi TMPR2, 0
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| lghi TMPR0, 0
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| cg TMPR2, (DISPATCH_GL(gcroot[GCROOT_BASEMT_NUM]))(DISPATCH)
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| cg TMPR0, (DISPATCH_GL(gcroot[GCROOT_BASEMT_NUM]))(DISPATCH)
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| jne ->fff_fallback
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| jne ->fff_fallback
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| ffgccheck // Caveat: uses label 1.
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| ffgccheck // Caveat: uses label 1.
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| lg L:RB, SAVE_L
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| lg L:RB, SAVE_L
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@ -1256,12 +1256,12 @@ static void build_subroutines(BuildCtx *ctx)
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| lghi RD, 1+2
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| lghi RD, 1+2
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| j ->fff_res
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| j ->fff_res
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|2: // Set missing 2nd arg to nil.
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|2: // Set missing 2nd arg to nil.
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| lghi TMPR2, LJ_TNIL
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| lghi TMPR0, LJ_TNIL
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| stg TMPR2, 8(BASE)
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| stg TMPR0, 8(BASE)
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| j <1
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| j <1
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|3: // End of traversal: return nil.
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|3: // End of traversal: return nil.
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| lghi TMPR2, LJ_TNIL
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| lghi TMPR0, LJ_TNIL
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| stg TMPR2, -16(BASE)
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| stg TMPR0, -16(BASE)
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| j ->fff_res1
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| j ->fff_res1
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|.ffunc_1 pairs
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|.ffunc_1 pairs
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@ -1269,7 +1269,7 @@ static void build_subroutines(BuildCtx *ctx)
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| lgr TMPR1, TAB:RB
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| lgr TMPR1, TAB:RB
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| checktab TAB:RB, ->fff_fallback
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| checktab TAB:RB, ->fff_fallback
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#if LJ_52
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#if LJ_52
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| ltg TMPR2, TAB:RB->metatable; jne ->fff_fallback
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| ltg TMPR0, TAB:RB->metatable; jne ->fff_fallback
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#endif
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#endif
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| lg CFUNC:RD, -16(BASE)
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| lg CFUNC:RD, -16(BASE)
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| cleartp CFUNC:RD
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| cleartp CFUNC:RD
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@ -1278,8 +1278,8 @@ static void build_subroutines(BuildCtx *ctx)
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| lg PC, -8(BASE)
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| lg PC, -8(BASE)
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| stg CFUNC:RD, -16(BASE)
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| stg CFUNC:RD, -16(BASE)
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| stg TMPR1, -8(BASE)
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| stg TMPR1, -8(BASE)
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| lghi TMPR2, LJ_TNIL
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| lghi TMPR0, LJ_TNIL
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| stg TMPR2, 0(BASE)
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| stg TMPR0, 0(BASE)
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| lghi RD, 1+3
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| lghi RD, 1+3
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| j ->fff_res
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| j ->fff_res
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@ -1298,13 +1298,13 @@ static void build_subroutines(BuildCtx *ctx)
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| sllg TMPR1, TMPR1, 3
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| sllg TMPR1, TMPR1, 3
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| la RD, 0(TMPR1, RD)
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| la RD, 0(TMPR1, RD)
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|1:
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|1:
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| lg TMPR2, 0(RD)
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| lg TMPR0, 0(RD)
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| cghi TMPR2, LJ_TNIL; je ->fff_res0
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| cghi TMPR0, LJ_TNIL; je ->fff_res0
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| // Copy array slot.
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| // Copy array slot.
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| stg TMPR2, -8(BASE)
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| stg TMPR0, -8(BASE)
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| j ->fff_res2
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| j ->fff_res2
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|2: // Check for empty hash part first. Otherwise call C function.
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|2: // Check for empty hash part first. Otherwise call C function.
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| lt TMPR2, TAB:RB->hmask; je ->fff_res0
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| lt TMPR0, TAB:RB->hmask; je ->fff_res0
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| lgr CARG1, TAB:RB
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| lgr CARG1, TAB:RB
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| lgr RB, BASE // Save BASE. // TODO: needed?
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| lgr RB, BASE // Save BASE. // TODO: needed?
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| lgfr CARG2, RA
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| lgfr CARG2, RA
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@ -1322,8 +1322,8 @@ static void build_subroutines(BuildCtx *ctx)
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| lgr TMPR1, TAB:RB
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| lgr TMPR1, TAB:RB
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| checktab TAB:RB, ->fff_fallback
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| checktab TAB:RB, ->fff_fallback
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#if LJ_52
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#if LJ_52
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| lghi TMPR2, 0
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| lghi TMPR0, 0
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| cg TMPR2, TAB:RB->metatable; jne ->fff_fallback
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| cg TMPR0, TAB:RB->metatable; jne ->fff_fallback
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#endif
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#endif
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| lg CFUNC:RD, -16(BASE)
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| lg CFUNC:RD, -16(BASE)
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| cleartp CFUNC:RD
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| cleartp CFUNC:RD
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@ -1375,7 +1375,7 @@ static void build_subroutines(BuildCtx *ctx)
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|.if resume
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|.if resume
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|.ffunc_1 coroutine_resume
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|.ffunc_1 coroutine_resume
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| lg L:RB, 0(BASE)
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| lg L:RB, 0(BASE)
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| lgr L:TMPR2, L:RB // Save type for checktptp.
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| lgr L:TMPR0, L:RB // Save type for checktptp.
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| cleartp L:RB
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| cleartp L:RB
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|.else
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|.else
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|.ffunc coroutine_wrap_aux
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|.ffunc coroutine_wrap_aux
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@ -1388,9 +1388,9 @@ static void build_subroutines(BuildCtx *ctx)
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| stg PC, SAVE_PC
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| stg PC, SAVE_PC
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| stg L:RB, TMP_STACK
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| stg L:RB, TMP_STACK
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|.if resume
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|.if resume
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| checktptp L:TMPR2, LJ_TTHREAD, ->fff_fallback
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| checktptp L:TMPR0, LJ_TTHREAD, ->fff_fallback
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|.endif
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|.endif
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| ltg TMPR2, L:RB->cframe; jne ->fff_fallback
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| ltg TMPR0, L:RB->cframe; jne ->fff_fallback
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| cli L:RB->status, LUA_YIELD; jh ->fff_fallback
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| cli L:RB->status, LUA_YIELD; jh ->fff_fallback
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| lg RA, L:RB->top
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| lg RA, L:RB->top
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| je >1 // Status != LUA_YIELD (i.e. 0)?
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| je >1 // Status != LUA_YIELD (i.e. 0)?
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@ -1523,8 +1523,8 @@ static void build_subroutines(BuildCtx *ctx)
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|.ffunc coroutine_yield
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|.ffunc coroutine_yield
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| lg L:RB, SAVE_L
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| lg L:RB, SAVE_L
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| lg TMPR2, L:RB->cframe
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| lg TMPR0, L:RB->cframe
|
||||||
| tmll TMPR2, CFRAME_RESUME
|
| tmll TMPR0, CFRAME_RESUME
|
||||||
| je ->fff_fallback
|
| je ->fff_fallback
|
||||||
| stg BASE, L:RB->base
|
| stg BASE, L:RB->base
|
||||||
| sllg RD, NARGS:RD, 3
|
| sllg RD, NARGS:RD, 3
|
||||||
@ -1585,8 +1585,8 @@ static void build_subroutines(BuildCtx *ctx)
|
|||||||
|
|
|
|
||||||
|6: // Fill up results with nil.
|
|6: // Fill up results with nil.
|
||||||
| sllg TMPR1, RD, 3
|
| sllg TMPR1, RD, 3
|
||||||
| lghi TMPR2, LJ_TNIL
|
| lghi TMPR0, LJ_TNIL
|
||||||
| stg TMPR2, -24(TMPR1, BASE)
|
| stg TMPR0, -24(TMPR1, BASE)
|
||||||
| la RD, 1(RD)
|
| la RD, 1(RD)
|
||||||
| j <5
|
| j <5
|
||||||
|
|
|
|
||||||
@ -1612,9 +1612,9 @@ static void build_subroutines(BuildCtx *ctx)
|
|||||||
|
|
|
|
||||||
|.ffunc math_log
|
|.ffunc math_log
|
||||||
| chi NARGS:RD, 1+1; jne ->fff_fallback // Exactly one argument.
|
| chi NARGS:RD, 1+1; jne ->fff_fallback // Exactly one argument.
|
||||||
| lg TMPR2, 0(BASE)
|
| lg TMPR0, 0(BASE)
|
||||||
| ld FARG1, 0(BASE)
|
| ld FARG1, 0(BASE)
|
||||||
| checknumtp TMPR2, ->fff_fallback
|
| checknumtp TMPR0, ->fff_fallback
|
||||||
| lgr RB, BASE
|
| lgr RB, BASE
|
||||||
| brasl r14, extern log
|
| brasl r14, extern log
|
||||||
| lgr BASE, RB
|
| lgr BASE, RB
|
||||||
@ -1652,10 +1652,10 @@ static void build_subroutines(BuildCtx *ctx)
|
|||||||
| math_extern2 fmod
|
| math_extern2 fmod
|
||||||
|
|
|
|
||||||
|.ffunc_2 math_ldexp
|
|.ffunc_2 math_ldexp
|
||||||
| lg TMPR2, 0(BASE)
|
| lg TMPR0, 0(BASE)
|
||||||
| ld FARG1, 0(BASE)
|
| ld FARG1, 0(BASE)
|
||||||
| lg CARG1, 8(BASE)
|
| lg CARG1, 8(BASE)
|
||||||
| checknumtp TMPR2, ->fff_fallback
|
| checknumtp TMPR0, ->fff_fallback
|
||||||
| checkinttp CARG1, ->fff_fallback
|
| checkinttp CARG1, ->fff_fallback
|
||||||
| lgfr CARG1, CARG1
|
| lgfr CARG1, CARG1
|
||||||
| lgr RB, BASE
|
| lgr RB, BASE
|
||||||
@ -1695,11 +1695,11 @@ static void build_subroutines(BuildCtx *ctx)
|
|||||||
| checkint RB, >4
|
| checkint RB, >4
|
||||||
|1: // Handle integers.
|
|1: // Handle integers.
|
||||||
| clgr RA, TMPR1; jhe ->fff_resRB
|
| clgr RA, TMPR1; jhe ->fff_resRB
|
||||||
| lg TMPR2, -8(RA, BASE)
|
| lg TMPR0, -8(RA, BASE)
|
||||||
| checkint TMPR2, >3
|
| checkint TMPR0, >3
|
||||||
| cr RB, TMPR2
|
| cr RB, TMPR0
|
||||||
| cjmp >2
|
| cjmp >2
|
||||||
| lgr RB, TMPR2
|
| lgr RB, TMPR0
|
||||||
|2:
|
|2:
|
||||||
| aghi RA, 8
|
| aghi RA, 8
|
||||||
| j <1
|
| j <1
|
||||||
@ -1707,7 +1707,7 @@ static void build_subroutines(BuildCtx *ctx)
|
|||||||
| jh ->fff_fallback
|
| jh ->fff_fallback
|
||||||
| // Convert intermediate result to number and continue below.
|
| // Convert intermediate result to number and continue below.
|
||||||
| cdfbr f0, RB
|
| cdfbr f0, RB
|
||||||
| ldgr f1, TMPR2
|
| ldgr f1, TMPR0
|
||||||
| j >6
|
| j >6
|
||||||
|4:
|
|4:
|
||||||
| jh ->fff_fallback
|
| jh ->fff_fallback
|
||||||
@ -1737,7 +1737,7 @@ static void build_subroutines(BuildCtx *ctx)
|
|||||||
| lg STR:RB, 0(BASE)
|
| lg STR:RB, 0(BASE)
|
||||||
| checkstr STR:RB, ->fff_fallback
|
| checkstr STR:RB, ->fff_fallback
|
||||||
| lg PC, -8(BASE)
|
| lg PC, -8(BASE)
|
||||||
| ltg TMPR2, STR:RB->len
|
| ltg TMPR0, STR:RB->len
|
||||||
| je ->fff_res0 // Return no results for empty string.
|
| je ->fff_res0 // Return no results for empty string.
|
||||||
| llgc RB, STR:RB[1]
|
| llgc RB, STR:RB[1]
|
||||||
| j ->fff_resi
|
| j ->fff_resi
|
||||||
@ -1907,8 +1907,8 @@ static void build_subroutines(BuildCtx *ctx)
|
|||||||
| j ->fff_resbit
|
| j ->fff_resbit
|
||||||
|
|
|
|
||||||
|.ffunc_bit bit_bnot, 1
|
|.ffunc_bit bit_bnot, 1
|
||||||
| lhi TMPR2, -1
|
| lhi TMPR0, -1
|
||||||
| xr RB, TMPR2 // TODO: use xilf on newer models?
|
| xr RB, TMPR0 // TODO: use xilf on newer models?
|
||||||
| j ->fff_resbit
|
| j ->fff_resbit
|
||||||
|
|
|
|
||||||
|->fff_fallback_bit_op:
|
|->fff_fallback_bit_op:
|
||||||
@ -1943,9 +1943,9 @@ static void build_subroutines(BuildCtx *ctx)
|
|||||||
| checkint RA, ->fff_fallback
|
| checkint RA, ->fff_fallback
|
||||||
| // TODO: shorter sequence of instructions to convert right rotate into left rotate.
|
| // TODO: shorter sequence of instructions to convert right rotate into left rotate.
|
||||||
| nill RA, 0x1f
|
| nill RA, 0x1f
|
||||||
| lghi TMPR2, 32
|
| lghi TMPR0, 32
|
||||||
| sr TMPR2, RA
|
| sr TMPR0, RA
|
||||||
| lr RA, TMPR2
|
| lr RA, TMPR0
|
||||||
| rll RB, RB, 0(RA)
|
| rll RB, RB, 0(RA)
|
||||||
| j ->fff_resbit
|
| j ->fff_resbit
|
||||||
|
|
|
|
||||||
@ -2050,9 +2050,9 @@ static void build_subroutines(BuildCtx *ctx)
|
|||||||
|
|
|
|
||||||
| tmll RD, LUA_MASKLINE|LUA_MASKCOUNT
|
| tmll RD, LUA_MASKLINE|LUA_MASKCOUNT
|
||||||
| je >5
|
| je >5
|
||||||
| ly TMPR2, (DISPATCH_GL(hookcount))(DISPATCH)
|
| ly TMPR0, (DISPATCH_GL(hookcount))(DISPATCH)
|
||||||
| ahi TMPR2, -1
|
| ahi TMPR0, -1
|
||||||
| sty TMPR2, (DISPATCH_GL(hookcount))(DISPATCH)
|
| sty TMPR0, (DISPATCH_GL(hookcount))(DISPATCH)
|
||||||
| je >1
|
| je >1
|
||||||
| tmll RD, LUA_MASKLINE
|
| tmll RD, LUA_MASKLINE
|
||||||
| je >5
|
| je >5
|
||||||
@ -2103,8 +2103,8 @@ static void build_subroutines(BuildCtx *ctx)
|
|||||||
| lgr CARG1, L:RB
|
| lgr CARG1, L:RB
|
||||||
| brasl r14, extern lj_dispatch_call // (lua_State *L, const BCIns *pc)
|
| brasl r14, extern lj_dispatch_call // (lua_State *L, const BCIns *pc)
|
||||||
| // ASMFunction returned in r2 (CRET1).
|
| // ASMFunction returned in r2 (CRET1).
|
||||||
| lghi TMPR2, 0
|
| lghi TMPR0, 0
|
||||||
| stg TMPR2, SAVE_PC // Invalidate for subsequent line hook.
|
| stg TMPR0, SAVE_PC // Invalidate for subsequent line hook.
|
||||||
|.if JIT
|
|.if JIT
|
||||||
| nill PC, -2
|
| nill PC, -2
|
||||||
|.endif
|
|.endif
|
||||||
@ -2604,8 +2604,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
|3:
|
|3:
|
||||||
| jh ->vmeta_unm
|
| jh ->vmeta_unm
|
||||||
| // Toggle sign bit.
|
| // Toggle sign bit.
|
||||||
| llihh TMPR2, 0x8000
|
| llihh TMPR0, 0x8000
|
||||||
| xgr RB, TMPR2
|
| xgr RB, TMPR0
|
||||||
| j <1
|
| j <1
|
||||||
break;
|
break;
|
||||||
case BC_LEN:
|
case BC_LEN:
|
||||||
@ -2793,10 +2793,10 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| sllg RC, RC, 3
|
| sllg RC, RC, 3
|
||||||
| ld FARG1, 0(RB, BASE)
|
| ld FARG1, 0(RB, BASE)
|
||||||
| ld FARG2, 0(RC, BASE)
|
| ld FARG2, 0(RC, BASE)
|
||||||
| lg TMPR2, 0(RB, BASE)
|
| lg TMPR0, 0(RB, BASE)
|
||||||
| checknumtp TMPR2, ->vmeta_arith_vvo
|
| checknumtp TMPR0, ->vmeta_arith_vvo
|
||||||
| lg TMPR2, 0(RC, BASE)
|
| lg TMPR0, 0(RC, BASE)
|
||||||
| checknumtp TMPR2, ->vmeta_arith_vvo
|
| checknumtp TMPR0, ->vmeta_arith_vvo
|
||||||
| lgr RB, BASE // TODO: redundant, BASE is currently callee-saved.
|
| lgr RB, BASE // TODO: redundant, BASE is currently callee-saved.
|
||||||
| brasl r14, extern pow // double pow(double x, double y), result in f0.
|
| brasl r14, extern pow // double pow(double x, double y), result in f0.
|
||||||
| llgc RA, PC_RA
|
| llgc RA, PC_RA
|
||||||
@ -2874,8 +2874,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| ins_AD // RA = dst, RD = primitive type (~)
|
| ins_AD // RA = dst, RD = primitive type (~)
|
||||||
| sllg RA, RA, 3
|
| sllg RA, RA, 3
|
||||||
| sllg RD, RD, 47
|
| sllg RD, RD, 47
|
||||||
| lghi TMPR2, -1
|
| lghi TMPR0, -1
|
||||||
| xgr RD, TMPR2 // not
|
| xgr RD, TMPR0 // not
|
||||||
| stg RD, 0(RA, BASE)
|
| stg RD, 0(RA, BASE)
|
||||||
| ins_next
|
| ins_next
|
||||||
break;
|
break;
|
||||||
@ -2994,8 +2994,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| cleartp LFUNC:RB
|
| cleartp LFUNC:RB
|
||||||
| lg UPVAL:RB, (offsetof(GCfuncL, uvptr))(RA, LFUNC:RB)
|
| lg UPVAL:RB, (offsetof(GCfuncL, uvptr))(RA, LFUNC:RB)
|
||||||
| sllg RD, RD, 47
|
| sllg RD, RD, 47
|
||||||
| lghi TMPR2, -1
|
| lghi TMPR0, -1
|
||||||
| xgr RD, TMPR2
|
| xgr RD, TMPR0
|
||||||
| lg RA, UPVAL:RB->v
|
| lg RA, UPVAL:RB->v
|
||||||
| stg RD, 0(RA)
|
| stg RD, 0(RA)
|
||||||
| ins_next
|
| ins_next
|
||||||
@ -3004,7 +3004,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| ins_AD // RA = level, RD = target
|
| ins_AD // RA = level, RD = target
|
||||||
| branchPC RD // Do this first to free RD.
|
| branchPC RD // Do this first to free RD.
|
||||||
| lg L:RB, SAVE_L
|
| lg L:RB, SAVE_L
|
||||||
| ltg TMPR2, L:RB->openupval
|
| ltg TMPR0, L:RB->openupval
|
||||||
| je >1
|
| je >1
|
||||||
| stg BASE, L:RB->base
|
| stg BASE, L:RB->base
|
||||||
| sllg RA, RA, 3
|
| sllg RA, RA, 3
|
||||||
@ -3046,9 +3046,9 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| jhe >5
|
| jhe >5
|
||||||
|1:
|
|1:
|
||||||
| srlg CARG3, RD, 11
|
| srlg CARG3, RD, 11
|
||||||
| llill TMPR2, 0x7ff
|
| llill TMPR0, 0x7ff
|
||||||
| nr RD, TMPR2
|
| nr RD, TMPR0
|
||||||
| cr RD, TMPR2
|
| cr RD, TMPR0
|
||||||
| je >3
|
| je >3
|
||||||
|2:
|
|2:
|
||||||
| lgr L:CARG1, L:RB
|
| lgr L:CARG1, L:RB
|
||||||
@ -3094,8 +3094,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| lgr L:CARG1, L:RB
|
| lgr L:CARG1, L:RB
|
||||||
| brasl r14, extern lj_gc_step_fixtop // (lua_State *L)
|
| brasl r14, extern lj_gc_step_fixtop // (lua_State *L)
|
||||||
| llgh RD, PC_RD // Need to reload RD.
|
| llgh RD, PC_RD // Need to reload RD.
|
||||||
| lghi TMPR2, -1
|
| lghi TMPR0, -1
|
||||||
| xgr RD, TMPR2 // not RD
|
| xgr RD, TMPR0 // not RD
|
||||||
| j <2
|
| j <2
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@ -3259,8 +3259,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| llgfr RC, RC
|
| llgfr RC, RC
|
||||||
| sllg RC, RC, 3
|
| sllg RC, RC, 3
|
||||||
| ag RC, TAB:RB->array
|
| ag RC, TAB:RB->array
|
||||||
| lghi TMPR2, LJ_TNIL
|
| lghi TMPR0, LJ_TNIL
|
||||||
| cg TMPR2, 0(RC)
|
| cg TMPR0, 0(RC)
|
||||||
| je >3 // Previous value is nil?
|
| je >3 // Previous value is nil?
|
||||||
|1:
|
|1:
|
||||||
| tm TAB:RB->marked, LJ_GC_BLACK // isblack(table)
|
| tm TAB:RB->marked, LJ_GC_BLACK // isblack(table)
|
||||||
@ -3292,8 +3292,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| ins_ABC // RA = src, RB = table, RC = str const (~)
|
| ins_ABC // RA = src, RB = table, RC = str const (~)
|
||||||
| sllg RB, RB, 3
|
| sllg RB, RB, 3
|
||||||
| lg TAB:RB, 0(RB, BASE)
|
| lg TAB:RB, 0(RB, BASE)
|
||||||
| lghi TMPR2, -1
|
| lghi TMPR0, -1
|
||||||
| xgr RC, TMPR2 // ~RC
|
| xgr RC, TMPR0 // ~RC
|
||||||
| sllg RC, RC, 3
|
| sllg RC, RC, 3
|
||||||
| lg STR:RC, 0(RC, KBASE)
|
| lg STR:RC, 0(RC, KBASE)
|
||||||
| checktab TAB:RB, ->vmeta_tsets
|
| checktab TAB:RB, ->vmeta_tsets
|
||||||
@ -3309,8 +3309,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| cg ITYPE, NODE:TMPR1->key
|
| cg ITYPE, NODE:TMPR1->key
|
||||||
| jne >5
|
| jne >5
|
||||||
| // Ok, key found. Assumes: offsetof(Node, val) == 0
|
| // Ok, key found. Assumes: offsetof(Node, val) == 0
|
||||||
| lghi TMPR2, LJ_TNIL
|
| lghi TMPR0, LJ_TNIL
|
||||||
| cg TMPR2, 0(TMPR1)
|
| cg TMPR0, 0(TMPR1)
|
||||||
| je >4 // Previous value is nil?
|
| je >4 // Previous value is nil?
|
||||||
|2:
|
|2:
|
||||||
| tm TAB:RB->marked, LJ_GC_BLACK // isblack(table)
|
| tm TAB:RB->marked, LJ_GC_BLACK // isblack(table)
|
||||||
@ -3369,8 +3369,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| jhe ->vmeta_tsetb
|
| jhe ->vmeta_tsetb
|
||||||
| sllg RC, RC, 3
|
| sllg RC, RC, 3
|
||||||
| ag RC, TAB:RB->array
|
| ag RC, TAB:RB->array
|
||||||
| lghi TMPR2, LJ_TNIL
|
| lghi TMPR0, LJ_TNIL
|
||||||
| cg TMPR2, 0(RC)
|
| cg TMPR0, 0(RC)
|
||||||
| je >3 // Previous value is nil?
|
| je >3 // Previous value is nil?
|
||||||
|1:
|
|1:
|
||||||
| tm TAB:RB->marked, LJ_GC_BLACK // isblack(table)
|
| tm TAB:RB->marked, LJ_GC_BLACK // isblack(table)
|
||||||
@ -3578,10 +3578,10 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
|1: // Traverse array part.
|
|1: // Traverse array part.
|
||||||
| clr RC, TMPR1; jhe >5 // Index points after array part?
|
| clr RC, TMPR1; jhe >5 // Index points after array part?
|
||||||
| sllg RD, RC, 3 // Warning: won't work if RD==RC!
|
| sllg RD, RC, 3 // Warning: won't work if RD==RC!
|
||||||
| lg TMPR2, 0(RD, ITYPE)
|
| lg TMPR0, 0(RD, ITYPE)
|
||||||
| cghi TMPR2, LJ_TNIL; je >4
|
| cghi TMPR0, LJ_TNIL; je >4
|
||||||
| // Copy array slot to returned value.
|
| // Copy array slot to returned value.
|
||||||
| lgr RB, TMPR2
|
| lgr RB, TMPR0
|
||||||
| stg RB, 8(RA, BASE)
|
| stg RB, 8(RA, BASE)
|
||||||
| // Return array index as a numeric key.
|
| // Return array index as a numeric key.
|
||||||
| setint ITYPE, RC
|
| setint ITYPE, RC
|
||||||
@ -3605,8 +3605,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| llgfr ITYPE, RC
|
| llgfr ITYPE, RC
|
||||||
| mghi ITYPE, #NODE
|
| mghi ITYPE, #NODE
|
||||||
| ag NODE:ITYPE, TAB:RB->node
|
| ag NODE:ITYPE, TAB:RB->node
|
||||||
| lghi TMPR2, LJ_TNIL
|
| lghi TMPR0, LJ_TNIL
|
||||||
| cg TMPR2, NODE:ITYPE->val; je >7
|
| cg TMPR0, NODE:ITYPE->val; je >7
|
||||||
| ar TMPR1, RC
|
| ar TMPR1, RC
|
||||||
| ahi TMPR1, 1
|
| ahi TMPR1, 1
|
||||||
| // Copy key and value from hash slot.
|
| // Copy key and value from hash slot.
|
||||||
@ -3629,8 +3629,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| checkfunc CFUNC:RB, >5
|
| checkfunc CFUNC:RB, >5
|
||||||
| lg TMPR1, -16(RA, BASE)
|
| lg TMPR1, -16(RA, BASE)
|
||||||
| checktptp TMPR1, LJ_TTAB, >5
|
| checktptp TMPR1, LJ_TTAB, >5
|
||||||
| lghi TMPR2, LJ_TNIL
|
| lghi TMPR0, LJ_TNIL
|
||||||
| cg TMPR2, -8(RA, BASE); jne >5
|
| cg TMPR0, -8(RA, BASE); jne >5
|
||||||
| llgc TMPR1, CFUNC:RB->ffid
|
| llgc TMPR1, CFUNC:RB->ffid
|
||||||
| clfi TMPR1, (uint8_t)FF_next_N; jne >5
|
| clfi TMPR1, (uint8_t)FF_next_N; jne >5
|
||||||
| branchPC RD
|
| branchPC RD
|
||||||
@ -3640,8 +3640,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
|1:
|
|1:
|
||||||
| ins_next
|
| ins_next
|
||||||
|5: // Despecialize bytecode if any of the checks fail.
|
|5: // Despecialize bytecode if any of the checks fail.
|
||||||
| lghi TMPR2, BC_JMP
|
| lghi TMPR0, BC_JMP
|
||||||
| stcy TMPR2, PC_OP
|
| stcy TMPR0, PC_OP
|
||||||
| branchPC RD
|
| branchPC RD
|
||||||
| mvi 3(PC), BC_ITERC
|
| mvi 3(PC), BC_ITERC
|
||||||
| j <1
|
| j <1
|
||||||
@ -3672,8 +3672,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| clgr TMPR1, BASE // No more vararg slots?
|
| clgr TMPR1, BASE // No more vararg slots?
|
||||||
| jl <1
|
| jl <1
|
||||||
|2: // Fill up remainder with nil.
|
|2: // Fill up remainder with nil.
|
||||||
| lghi TMPR2, LJ_TNIL // TODO: move out of loop. Add NIL range macro?
|
| lghi TMPR0, LJ_TNIL // TODO: move out of loop. Add NIL range macro?
|
||||||
| stg TMPR2, 0(RA)
|
| stg TMPR0, 0(RA)
|
||||||
| la RA, 8(RA)
|
| la RA, 8(RA)
|
||||||
| clgr RA, RB
|
| clgr RA, RB
|
||||||
| jl <2
|
| jl <2
|
||||||
@ -3681,8 +3681,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| ins_next
|
| ins_next
|
||||||
|
|
|
|
||||||
|5: // Copy all varargs.
|
|5: // Copy all varargs.
|
||||||
| lghi TMPR2, 1
|
| lghi TMPR0, 1
|
||||||
| st TMPR2, SAVE_MULTRES // MULTRES = 0+1
|
| st TMPR0, SAVE_MULTRES // MULTRES = 0+1
|
||||||
| lgr RC, BASE
|
| lgr RC, BASE
|
||||||
| slgr RC, TMPR1
|
| slgr RC, TMPR1
|
||||||
| jno <3 // No vararg slots? (borrow or zero)
|
| jno <3 // No vararg slots? (borrow or zero)
|
||||||
@ -3840,8 +3840,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
#ifdef LUA_USE_ASSERT
|
#ifdef LUA_USE_ASSERT
|
||||||
| // lg TMPR1, FOR_STOP
|
| // lg TMPR1, FOR_STOP
|
||||||
| checkinttp TMPR1, ->assert_bad_for_arg_type
|
| checkinttp TMPR1, ->assert_bad_for_arg_type
|
||||||
| lg TMPR2, FOR_STEP
|
| lg TMPR0, FOR_STEP
|
||||||
| checkinttp TMPR2, ->assert_bad_for_arg_type
|
| checkinttp TMPR0, ->assert_bad_for_arg_type
|
||||||
#endif
|
#endif
|
||||||
| lg ITYPE, FOR_STEP
|
| lg ITYPE, FOR_STEP
|
||||||
| chi ITYPE, 0; jl >5
|
| chi ITYPE, 0; jl >5
|
||||||
@ -3903,14 +3903,14 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
| jhe ->vmeta_for
|
| jhe ->vmeta_for
|
||||||
}
|
}
|
||||||
if (!vk) {
|
if (!vk) {
|
||||||
| lg TMPR2, FOR_STOP
|
| lg TMPR0, FOR_STOP
|
||||||
| checknumtp TMPR2, ->vmeta_for
|
| checknumtp TMPR0, ->vmeta_for
|
||||||
} else {
|
} else {
|
||||||
#ifdef LUA_USE_ASSERT
|
#ifdef LUA_USE_ASSERT
|
||||||
| lg TMPR2, FOR_STOP
|
| lg TMPR0, FOR_STOP
|
||||||
| checknumtp TMPR2, ->assert_bad_for_arg_type
|
| checknumtp TMPR0, ->assert_bad_for_arg_type
|
||||||
| lg TMPR2, FOR_STEP
|
| lg TMPR0, FOR_STEP
|
||||||
| checknumtp TMPR2, ->assert_bad_for_arg_type
|
| checknumtp TMPR0, ->assert_bad_for_arg_type
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
| lg RB, FOR_STEP
|
| lg RB, FOR_STEP
|
||||||
@ -4042,8 +4042,8 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
|||||||
|3: // Clear missing parameters.
|
|3: // Clear missing parameters.
|
||||||
| // TODO: optimize this. Some of this can be hoisted.
|
| // TODO: optimize this. Some of this can be hoisted.
|
||||||
| sllg TMPR1, NARGS:RD, 3
|
| sllg TMPR1, NARGS:RD, 3
|
||||||
| lghi TMPR2, LJ_TNIL
|
| lghi TMPR0, LJ_TNIL
|
||||||
| stg TMPR2, -8(TMPR1, BASE)
|
| stg TMPR0, -8(TMPR1, BASE)
|
||||||
| la RD, 1(RD)
|
| la RD, 1(RD)
|
||||||
| clgr RD, RA
|
| clgr RD, RA
|
||||||
| jle <3
|
| jle <3
|
||||||
|
Loading…
Reference in New Issue
Block a user