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ARM: Add call and iterator call instructions.
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@ -1223,10 +1223,22 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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/* -- Calls and vararg handling ----------------------------------------- */
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case BC_CALLM:
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| NYI
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| // RA = base*8, (RB = nresults+1,) RC = extra_nargs
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| ldr CARG1, SAVE_MULTRES
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| decode_RC8 NARGS8:RC, INS
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| add NARGS8:RC, NARGS8:RC, CARG1
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| b ->BC_CALL_Z
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break;
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case BC_CALL:
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| NYI
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| // RA = base*8, (RB = nresults+1,) RC = nargs+1
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| decode_RC8 NARGS8:RC, INS
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|->BC_CALL_Z:
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| mov RB, BASE // Save old BASE for vmeta_call.
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| ldrd CARG34, [BASE, RA]!
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| sub NARGS8:RC, NARGS8:RC, #8
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| add BASE, BASE, #8
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| checkfunc CARG4, ->vmeta_call
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| ins_call
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break;
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case BC_CALLMT:
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@ -1237,15 +1249,104 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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break;
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case BC_ITERC:
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| NYI
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| // RA = base*8, (RB = nresults+1, RC = nargs+1 (2+1))
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| add RA, BASE, RA
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| mov RB, BASE // Save old BASE for vmeta_call.
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| ldrd CARG34, [RA, #-16]
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| ldrd CARG12, [RA, #-8]
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| add BASE, RA, #8
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| strd CARG34, [RA, #8] // Copy state.
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| strd CARG12, [RA, #16] // Copy control var.
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| // STALL: locked CARG34.
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| ldrd LFUNC:CARG34, [RA, #-24]
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| mov NARGS8:RC, #16 // Iterators get 2 arguments.
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| // STALL: load CARG34.
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| strd LFUNC:CARG34, [RA] // Copy callable.
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| checkfunc CARG4, ->vmeta_call
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| ins_call
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break;
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case BC_ITERN:
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| NYI
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| // RA = base*8, (RB = nresults+1, RC = nargs+1 (2+1))
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#if LJ_HASJIT
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| // NYI: add hotloop, record BC_ITERN.
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#endif
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| add RA, BASE, RA
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| ldr TAB:RB, [RA, #-16]
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| ldr CARG1, [RA, #-8] // Get index from control var.
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| ldr INS, TAB:RB->asize
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| ldr CARG2, TAB:RB->array
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| add PC, PC, #4
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|1: // Traverse array part.
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| subs RC, CARG1, INS
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| add CARG3, CARG2, CARG1, lsl #3
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| bhs >5 // Index points after array part?
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| ldrd CARG34, [CARG3]
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| checktp CARG4, LJ_TNIL
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| addeq CARG1, CARG1, #1 // Skip holes in array part.
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| beq <1
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| ldrh RC, [PC, #-2]
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| mvn CARG2, #~LJ_TISNUM
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| strd CARG34, [RA, #8]
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| add RC, PC, RC, lsl #2
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| add RB, CARG1, #1
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| strd CARG12, [RA]
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| sub PC, RC, #0x20000
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| str RB, [RA, #-8] // Update control var.
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|3:
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| ins_next
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|5: // Traverse hash part.
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| ldr CARG4, TAB:RB->hmask
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| ldr NODE:RB, TAB:RB->node
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|6:
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| add CARG1, RC, RC, lsl #1
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| cmp RC, CARG4 // End of iteration? Branch to ITERL+1.
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| add NODE:CARG3, NODE:RB, CARG1, lsl #3 // node = tab->node + idx*3*8
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| bhi <3
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| ldrd CARG12, NODE:CARG3->val
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| checktp CARG2, LJ_TNIL
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| add RC, RC, #1
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| beq <6 // Skip holes in hash part.
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| ldrh RB, [PC, #-2]
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| add RC, RC, INS
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| ldrd CARG34, NODE:CARG3->key
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| str RC, [RA, #-8] // Update control var.
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| strd CARG12, [RA, #8]
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| add RC, PC, RB, lsl #2
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| sub PC, RC, #0x20000
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| strd CARG34, [RA]
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| b <3
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break;
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case BC_ISNEXT:
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| NYI
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| // RA = base*8, RD = target (points to ITERN)
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| add RA, BASE, RA
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| add RC, PC, RC, lsl #2
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| ldrd CFUNC:CARG12, [RA, #-24]
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| ldr CARG3, [RA, #-12]
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| ldr CARG4, [RA, #-4]
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| checktp CARG2, LJ_TFUNC
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| ldrbeq CARG1, CFUNC:CARG1->ffid
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| checktpeq CARG3, LJ_TTAB
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| checktpeq CARG4, LJ_TNIL
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| cmpeq CARG1, #FF_next_N
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| subeq PC, RC, #0x20000
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| bne >5
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| ins_next1
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| ins_next2
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| mov CARG1, #0
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| str CARG1, [RA, #-8] // Initialize control var.
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|1:
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| ins_next3
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|5: // Despecialize bytecode if any of the checks fail.
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| mov CARG1, #BC_JMP
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| mov OP, #BC_ITERC
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| strb CARG1, [PC, #-4]
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| sub PC, RC, #0x20000
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| strb OP, [PC] // Subsumes ins_next1.
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| ins_next2
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| b <1
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break;
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case BC_VARG:
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@ -1490,7 +1591,18 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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break;
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#endif
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case BC_IITERL:
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| NYI
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| // RA = base*8, RC = target
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| ldrd CARG12, [RA, BASE]!
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if (op == BC_JITERL) {
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| NYI
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} else {
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| add RC, PC, RC, lsl #2
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| // STALL: load CARG12.
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| cmn CARG2, #-LJ_TNIL // Stop if iterator returned nil.
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| subne PC, RC, #0x20000 // Otherwise save control var + branch.
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| strdne CARG12, [RA, #-8]
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}
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| ins_next
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break;
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case BC_LOOP:
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