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x64/LJ_GC64: Fix emit_rma().
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@ -343,9 +343,27 @@ static void emit_rma(ASMState *as, x86Op xo, Reg rr, const void *addr)
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emit_rmro(as, xo, rr, RID_DISPATCH, (int32_t)dispofs(as, addr));
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} else if (checki32(mcpofs(as, addr)) && checki32(mctopofs(as, addr))) {
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emit_rmro(as, xo, rr, RID_RIP, (int32_t)mcpofs(as, addr));
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} else if (!checki32((intptr_t)addr) && (xo == XO_MOV || xo == XO_MOVSD)) {
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emit_rmro(as, xo, rr, rr, 0);
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emit_loadu64(as, rr, (uintptr_t)addr);
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} else if (!checki32((intptr_t)addr)) {
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Reg ra = (rr & 15);
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if (xo != XO_MOV) {
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/* We can't allocate a register here. Use and restore DISPATCH. Ugly. */
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uint64_t dispaddr = (uintptr_t)J2GG(as->J)->dispatch;
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uint8_t i8 = xo == XO_GROUP3b ? *as->mcp++ : 0;
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ra = RID_DISPATCH;
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if (checku32(dispaddr)) {
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emit_loadi(as, ra, (int32_t)dispaddr);
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} else { /* Full-size 64 bit load. */
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MCode *p = as->mcp;
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*(uint64_t *)(p-8) = dispaddr;
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p[-9] = (MCode)(XI_MOVri+(ra&7));
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p[-10] = 0x48 + ((ra>>3)&1);
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p -= 10;
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as->mcp = p;
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}
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if (xo == XO_GROUP3b) emit_i8(as, i8);
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}
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emit_rmro(as, xo, rr, ra, 0);
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emit_loadu64(as, ra, (uintptr_t)addr);
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} else
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#endif
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{
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