Extended emit_op to support 4 byte opcodes based on checking a new flag OP4B in rr

This commit is contained in:
fsfod 2016-03-29 11:12:42 +01:00
parent de4c0b6ea5
commit 7c697b0a5c

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@ -26,6 +26,8 @@
#define REX_GC64 0 #define REX_GC64 0
#endif #endif
#define OP4B 0x4000
#define VEX_256 0x40000 #define VEX_256 0x40000
/* msb is also set to c5 so we can spot a vex op in op_emit */ /* msb is also set to c5 so we can spot a vex op in op_emit */
@ -76,6 +78,8 @@ static LJ_AINLINE MCode *emit_op(x86Op xo, Reg rr, Reg rb, Reg rx,
int n = (int8_t)xo; int n = (int8_t)xo;
if ((n + 58) <= 0) { /* VEX-encoded instruction */ if ((n + 58) <= 0) { /* VEX-encoded instruction */
return emit_vop(xo, rr, rb, rx, p, delta); return emit_vop(xo, rr, rb, rx, p, delta);
} else if (rr & OP4B) {
n = -5;
} }
#if defined(__GNUC__) #if defined(__GNUC__)
if (__builtin_constant_p(xo) && n == -2) if (__builtin_constant_p(xo) && n == -2)
@ -92,6 +96,7 @@ static LJ_AINLINE MCode *emit_op(x86Op xo, Reg rr, Reg rb, Reg rx,
if (rex != 0x40) { if (rex != 0x40) {
rex |= (rr >> 16); rex |= (rr >> 16);
if (n == -4) { *p = (MCode)rex; rex = (MCode)(xo >> 8); } if (n == -4) { *p = (MCode)rex; rex = (MCode)(xo >> 8); }
else if (n == -5) { *p = (MCode)rex; rex = (MCode)(xo); }
else if ((xo & 0xffffff) == 0x6600fd) { *p = (MCode)rex; rex = 0x66; } else if ((xo & 0xffffff) == 0x6600fd) { *p = (MCode)rex; rex = 0x66; }
*--p = (MCode)rex; *--p = (MCode)rex;
} }