From 78c97bc5a1529b0e21d417011ddb956c08a4643e Mon Sep 17 00:00:00 2001
From: Mike Pall <mike>
Date: Thu, 28 Feb 2013 17:52:31 +0100
Subject: [PATCH] MIPS: Fix cache flush/sync for JIT-compiled code jump area.

---
 src/lj_asm_mips.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h
index cd283b88..e80f7582 100644
--- a/src/lj_asm_mips.h
+++ b/src/lj_asm_mips.h
@@ -71,6 +71,7 @@ static void asm_sparejump_setup(ASMState *as)
     memset(mxp+2, 0, MIPS_SPAREJUMP*8);
     mxp += MIPS_SPAREJUMP*2;
     lua_assert(mxp < as->mctop);
+    lj_mcode_sync(as->mcbot, mxp);
     lj_mcode_commitbot(as->J, mxp);
     as->mcbot = mxp;
     as->mclim = as->mcbot + MCLIM_REDZONE;