From 6fc4c0c1a8d2687a1cfc2316c9117c4eb8c6aa8e Mon Sep 17 00:00:00 2001
From: Michael Munday <munday@ca.ibm.com>
Date: Thu, 22 Dec 2016 12:41:00 -0500
Subject: [PATCH] Fix BC_MCALL

RC and RD are the same register on x64, so sometimes it uses them
interchangeably. Probably we should make them the same register
on s390x, but that would involve changing the instruction decode
code which I would rather leave until we have a test suite passing.
---
 src/vm_s390x.dasc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/vm_s390x.dasc b/src/vm_s390x.dasc
index 8cf4b3f7..c7145681 100644
--- a/src/vm_s390x.dasc
+++ b/src/vm_s390x.dasc
@@ -2057,6 +2057,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
 
   case BC_CALL: case BC_CALLM:
     |  ins_A_C	// RA = base, (RB = nresults+1,) RC = nargs+1 | extra_nargs
+    |  lgr RD, RC
     if (op == BC_CALLM) {
       |  ag NARGS:RD, SAVE_MULTRES			// TODO: MULTRES is 32-bit on x64
     }
@@ -2064,7 +2065,6 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
     |  lg LFUNC:RB, 0(BASE, RA)
     |  checkfunc LFUNC:RB, ->vmeta_call_ra
     |  la BASE, 16(RA, BASE)
-    |  lgr RD, RC
     |  ins_call
     break;