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Add build infrastructure for the SSE2-enabled interpreter.
Works on x86 now. Will be enabled by default on x64 (not ready, yet).
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@ -62,6 +62,14 @@ XCFLAGS=
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# interpreter. Don't bother if your OS wouldn't run on them, anyway.
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# interpreter. Don't bother if your OS wouldn't run on them, anyway.
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#XCFLAGS+= -DLUAJIT_CPU_NOCMOV
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#XCFLAGS+= -DLUAJIT_CPU_NOCMOV
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#
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#
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# Use SSE2 instructions instead of x87 instructions in the x86 interpreter
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# (always enabled for x64). A pure interpreter built with this flag won't
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# run on older CPUs (before P4 or K8). There isn't much of a speed
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# difference, so this is not enabled by default.
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# The JIT compiler is not affected by this flag. It always uses runtime
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# CPU feature detection before emitting code for SSE2 up to SSE4.1.
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#XCFLAGS+= -DLUAJIT_CPU_SSE2
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#
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# Disable the JIT compiler, i.e. turn LuaJIT into a pure interpreter:
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# Disable the JIT compiler, i.e. turn LuaJIT into a pure interpreter:
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#XCFLAGS+= -DLUAJIT_DISABLE_JIT
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#XCFLAGS+= -DLUAJIT_DISABLE_JIT
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#
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#
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@ -4554,7 +4554,7 @@ static int build_backend(BuildCtx *ctx)
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#ifdef LUAJIT_CPU_NOCMOV
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#ifdef LUAJIT_CPU_NOCMOV
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cmov = 0;
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cmov = 0;
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#endif
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#endif
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#ifdef LUAJIT_CPU_SSE2
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#if defined(LUAJIT_CPU_SSE2) || defined(LJ_TARGET_X64)
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sse = 1;
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sse = 1;
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#endif
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#endif
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@ -2290,7 +2290,7 @@ static int build_backend(BuildCtx *ctx)
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#ifdef LUAJIT_CPU_NOCMOV
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#ifdef LUAJIT_CPU_NOCMOV
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cmov = 0;
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cmov = 0;
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#endif
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#endif
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#ifdef LUAJIT_CPU_SSE2
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#if defined(LUAJIT_CPU_SSE2) || defined(LJ_TARGET_X64)
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sse = 1;
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sse = 1;
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#endif
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#endif
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@ -524,10 +524,11 @@ static uint32_t jit_cpudetect(lua_State *L)
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if (lj_vm_cpuid(0, vendor) && lj_vm_cpuid(1, features)) {
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if (lj_vm_cpuid(0, vendor) && lj_vm_cpuid(1, features)) {
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#if !LJ_HASJIT
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#if !LJ_HASJIT
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#define JIT_F_CMOV 1
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#define JIT_F_CMOV 1
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#define JIT_F_SSE2 2
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#endif
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#endif
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flags |= ((features[3] >> 15)&1) * JIT_F_CMOV;
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flags |= ((features[3] >> 15)&1) * JIT_F_CMOV;
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#if LJ_HASJIT
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flags |= ((features[3] >> 26)&1) * JIT_F_SSE2;
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flags |= ((features[3] >> 26)&1) * JIT_F_SSE2;
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#if LJ_HASJIT
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flags |= ((features[2] >> 19)&1) * JIT_F_SSE4_1;
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flags |= ((features[2] >> 19)&1) * JIT_F_SSE4_1;
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if (vendor[2] == 0x6c65746e) { /* Intel. */
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if (vendor[2] == 0x6c65746e) { /* Intel. */
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if ((features[0] & 0x0ff00f00) == 0x00000f00) /* P4. */
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if ((features[0] & 0x0ff00f00) == 0x00000f00) /* P4. */
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@ -543,13 +544,20 @@ static uint32_t jit_cpudetect(lua_State *L)
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}
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}
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#endif
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#endif
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}
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}
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#ifndef LUAJIT_CPU_NOCMOV
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/* Check for required instruction set support on x86. */
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#if LJ_TARGET_X86
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#if !defined(LUAJIT_CPU_NOCMOV)
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if (!(flags & JIT_F_CMOV))
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if (!(flags & JIT_F_CMOV))
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luaL_error(L, "Ancient CPU lacks CMOV support (recompile with -DLUAJIT_CPU_NOCMOV)");
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luaL_error(L, "Ancient CPU lacks CMOV support (recompile with -DLUAJIT_CPU_NOCMOV)");
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#endif
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#endif
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#if LJ_HASJIT
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if (!(flags & JIT_F_SSE2))
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if (!(flags & JIT_F_SSE2))
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#if defined(LUAJIT_CPU_SSE2)
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luaL_error(L, "CPU does not support SSE2 (recompile without -DLUAJIT_CPU_SSE2)");
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#elif LJ_HASJIT
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luaL_error(L, "Sorry, SSE2 CPU support required for this beta release");
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luaL_error(L, "Sorry, SSE2 CPU support required for this beta release");
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#else
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(void)0;
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#endif
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#endif
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#endif
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UNUSED(L);
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UNUSED(L);
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#else
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#else
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