From 6a878b04413b0b02412399aaa9dd8f3767a193f7 Mon Sep 17 00:00:00 2001
From: Mike Pall <mike>
Date: Wed, 31 Jul 2013 01:48:21 +0200
Subject: [PATCH] ARM: Fix register allocation when rematerializing FPRs.

---
 src/lj_asm_arm.h | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/lj_asm_arm.h b/src/lj_asm_arm.h
index a66573c0..d1bdd409 100644
--- a/src/lj_asm_arm.h
+++ b/src/lj_asm_arm.h
@@ -521,10 +521,10 @@ static void asm_tointg(ASMState *as, IRIns *ir, Reg left)
 static void asm_tobit(ASMState *as, IRIns *ir)
 {
   RegSet allow = RSET_FPR;
-  Reg dest = ra_dest(as, ir, RSET_GPR);
   Reg left = ra_alloc1(as, ir->op1, allow);
   Reg right = ra_alloc1(as, ir->op2, rset_clear(allow, left));
   Reg tmp = ra_scratch(as, rset_clear(allow, right));
+  Reg dest = ra_dest(as, ir, RSET_GPR);
   emit_dn(as, ARMI_VMOV_R_S, dest, (tmp & 15));
   emit_dnm(as, ARMI_VADD_D, (tmp & 15), (left & 15), (right & 15));
 }
@@ -564,9 +564,9 @@ static void asm_conv(ASMState *as, IRIns *ir)
       lua_assert(irt_isint(ir->t) && st == IRT_NUM);
       asm_tointg(as, ir, ra_alloc1(as, lref, RSET_FPR));
     } else {
-      Reg dest = ra_dest(as, ir, RSET_GPR);
       Reg left = ra_alloc1(as, lref, RSET_FPR);
       Reg tmp = ra_scratch(as, rset_exclude(RSET_FPR, left));
+      Reg dest = ra_dest(as, ir, RSET_GPR);
       ARMIns ai;
       emit_dn(as, ARMI_VMOV_R_S, dest, (tmp & 15));
       ai = irt_isint(ir->t) ?
@@ -1210,6 +1210,9 @@ static void asm_sload(ASMState *as, IRIns *ir)
   } else
 #endif
   if (ra_used(ir)) {
+    Reg tmp = RID_NONE;
+    if ((ir->op2 & IRSLOAD_CONVERT))
+      tmp = ra_scratch(as, t == IRT_INT ? RSET_FPR : RSET_GPR);
     lua_assert((LJ_SOFTFP ? 0 : irt_isnum(ir->t)) ||
 	       irt_isint(ir->t) || irt_isaddr(ir->t));
     dest = ra_dest(as, ir, (!LJ_SOFTFP && t == IRT_NUM) ? RSET_FPR : allow);
@@ -1217,18 +1220,15 @@ static void asm_sload(ASMState *as, IRIns *ir)
     base = ra_alloc1(as, REF_BASE, allow);
     if ((ir->op2 & IRSLOAD_CONVERT)) {
       if (t == IRT_INT) {
-	Reg tmp = ra_scratch(as, RSET_FPR);
 	emit_dn(as, ARMI_VMOV_R_S, dest, (tmp & 15));
 	emit_dm(as, ARMI_VCVT_S32_F64, (tmp & 15), (tmp & 15));
-	dest = tmp;
 	t = IRT_NUM;  /* Check for original type. */
       } else {
-	Reg tmp = ra_scratch(as, RSET_GPR);
 	emit_dm(as, ARMI_VCVT_F64_S32, (dest & 15), (dest & 15));
 	emit_dn(as, ARMI_VMOV_S_R, tmp, (dest & 15));
-	dest = tmp;
 	t = IRT_INT;  /* Check for original type. */
       }
+      dest = tmp;
     }
     goto dotypecheck;
   }
@@ -1503,7 +1503,7 @@ static void asm_intmul(ASMState *as, IRIns *ir)
   if (dest == left && left != right) { left = right; right = dest; }
   if (irt_isguard(ir->t)) {  /* IR_MULOV */
     if (!(as->flags & JIT_F_ARMV6) && dest == left)
-      tmp = left = ra_scratch(as, rset_exclude(RSET_FPR, left));
+      tmp = left = ra_scratch(as, rset_exclude(RSET_GPR, left));
     asm_guardcc(as, CC_NE);
     emit_nm(as, ARMI_TEQ|ARMF_SH(ARMSH_ASR, 31), RID_TMP, dest);
     emit_dnm(as, ARMI_SMULL|ARMF_S(right), dest, RID_TMP, left);