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DynASM/ARM64: Fix LSL/BFI* encoding with variable registers.

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Thanks to Dmitry Stogov.
This commit is contained in:
Mike Pall 2022-06-02 13:48:04 +02:00
parent d4b6bb80ea
commit 68bb11405c
1 changed files with 4 additions and 4 deletions
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8
dynasm/dasm_arm64.lua
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@ -248,7 +248,7 @@ local map_cond = {
local parse_reg_type
local function parse_reg(expr, shift)
local function parse_reg(expr, shift, no_vreg)
if not expr then werror("expected register name") end
local tname, ovreg = match(expr, "^([%w_]+):(@?%l%d+)$")
if not tname then
@ -281,7 +281,7 @@ local function parse_reg(expr, shift)
elseif parse_reg_type ~= vrt then
werror("register size mismatch")
end
if shift then waction("VREG", shift, vreg) end
if not no_vreg then waction("VREG", shift, vreg) end
return 0
end
werror("bad register name `"..expr.."'")
@ -638,7 +638,7 @@ local function alias_bfx(p)
end
local function alias_bfiz(p)
parse_reg(p[1], 0)
parse_reg(p[1], 0, true)
if parse_reg_type == "w" then
p[3] = "#(32-("..p[3]:sub(2).."))%32"
p[4] = "#("..p[4]:sub(2)..")-1"
@ -649,7 +649,7 @@ local function alias_bfiz(p)
end
local alias_lslimm = op_alias("ubfm_4", function(p)
parse_reg(p[1], 0)
parse_reg(p[1], 0, true)
local sh = p[3]:sub(2)
if parse_reg_type == "w" then
p[3] = "#(32-("..sh.."))%32"