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ARM: Fix stack check for spilled BASE in parent.
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parent
2591b4524a
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60b8e9e2fb
@ -1422,8 +1422,9 @@ static void asm_stack_check(ASMState *as, BCReg topslot,
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Reg pbase;
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uint32_t k;
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if (irp) {
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if (ra_hasreg(irp->r)) {
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if (!ra_hasspill(irp->s)) {
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pbase = irp->r;
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lua_assert(ra_hasreg(pbase));
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} else if (allow) {
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pbase = rset_pickbot(allow);
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} else {
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@ -1442,14 +1443,11 @@ static void asm_stack_check(ASMState *as, BCReg topslot,
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(int32_t)offsetof(lua_State, maxstack));
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if (irp) { /* Must not spill arbitrary registers in head of side trace. */
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int32_t i = i32ptr(&J2G(as->J)->jit_L);
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if (ra_noreg(irp->r)) {
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lua_assert(ra_hasspill(irp->s));
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emit_lso(as, ARMI_LDR, RID_RET, RID_SP, sps_scale(irp->s));
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}
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if (ra_hasspill(irp->s))
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emit_lso(as, ARMI_LDR, pbase, RID_SP, sps_scale(irp->s));
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emit_lso(as, ARMI_LDR, RID_TMP, RID_TMP, (i & 4095));
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if (ra_noreg(irp->r)) {
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if (ra_hasspill(irp->s) && !allow)
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emit_lso(as, ARMI_STR, RID_RET, RID_SP, 0); /* Save temp. register. */
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}
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emit_loadi(as, RID_TMP, (i & ~4095));
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} else {
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emit_getgl(as, RID_TMP, jit_L);
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