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Remove unnecessary register moves.
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@ -272,12 +272,9 @@
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|.define PC_RD, -4(PC)
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|.define PC_RD, -4(PC)
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|.macro branchPC, reg
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|.macro branchPC, reg
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| // TODO: optimize this, was just lea PC, [PC+reg*4-BCBIAS_J*4].
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| // Must not clobber condition code.
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| // Can't clobber TMPR1 or condition code.
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| lgr TMPR0, TMPR1 // Workaround because TMPR0 == r0 and can't be used in lay.
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| sllg TMPR1, reg, 2
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| sllg TMPR1, reg, 2
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| lay PC, (-BCBIAS_J*4)(TMPR1, PC)
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| lay PC, (-BCBIAS_J*4)(TMPR1, PC)
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| lgr TMPR1, TMPR0
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|.endmacro
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|.endmacro
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|// Set current VM state.
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|// Set current VM state.
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