From 58460de58fd1fe3eae8a17597e0fa91a69bcff2e Mon Sep 17 00:00:00 2001
From: Michael Munday <munday@ca.ibm.com>
Date: Mon, 30 Jan 2017 16:40:32 -0500
Subject: [PATCH] Hoist some loop invariants.

---
 src/vm_s390x.dasc | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/vm_s390x.dasc b/src/vm_s390x.dasc
index 5ebd20c0..939aea3b 100644
--- a/src/vm_s390x.dasc
+++ b/src/vm_s390x.dasc
@@ -3614,6 +3614,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
     |  je >5				// Copy all varargs?
     |  lay RB, -8(RA, RB)
     |  clgr TMPR1, BASE			// No vararg slots?
+    |  lghi TMPR0, LJ_TNIL
     |  jnl >2
     |1:  // Copy vararg slots to destination slots.
     |  lg RC, -16(TMPR1)
@@ -3625,7 +3626,6 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
     |  clgr TMPR1, BASE			// No more vararg slots?
     |  jl <1
     |2:  // Fill up remainder with nil.
-    |  lghi TMPR0, LJ_TNIL // TODO: move out of loop. Add NIL range macro?
     |  stg TMPR0, 0(RA)
     |  la RA, 8(RA)
     |  clgr RA, RB
@@ -3993,13 +3993,14 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
     }
     |
     |3:  // Clear missing parameters.
-    |  // TODO: optimize this. Some of this can be hoisted.
     |  sllg TMPR1, NARGS:RD, 3
     |  lghi TMPR0, LJ_TNIL
+    |4:
     |  stg TMPR0, -8(TMPR1, BASE)
+    |  la TMPR1, 8(TMPR1)
     |  la RD, 1(RD)
     |  clgr RD, RA
-    |  jle <3
+    |  jle <4
     |  j <2
     break;