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x86: Remove x87 support from interpreter.

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SSE2 required from now on.
This commit is contained in:
Mike Pall 2013-02-21 16:56:59 +01:00
parent 61fb587d2c
commit 57768cd588
7 changed files with 100 additions and 645 deletions
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11
src/Makefile
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@ -42,13 +42,10 @@ CCOPT= -O2 -fomit-frame-pointer
# #
# Target-specific compiler options: # Target-specific compiler options:
# #
# x86 only: it's recommended to compile at least for i686. Better yet,
# compile for an architecture that has SSE2, too (-msse -msse2).
#
# x86/x64 only: For GCC 4.2 or higher and if you don't intend to distribute # x86/x64 only: For GCC 4.2 or higher and if you don't intend to distribute
# the binaries to a different machine you could also use: -march=native # the binaries to a different machine you could also use: -march=native
# #
CCOPT_x86= -march=i686 CCOPT_x86= -march=i686 -msse -msse2 -mfpmath=sse
CCOPT_x64= CCOPT_x64=
CCOPT_arm= CCOPT_arm=
CCOPT_ppc= CCOPT_ppc=
@ -394,11 +391,6 @@ DASM_AFLAGS+= -D VER=$(subst LJ_ARCH_VERSION_,,$(filter LJ_ARCH_VERSION_%,$(subs
ifeq (Windows,$(TARGET_SYS)) ifeq (Windows,$(TARGET_SYS))
DASM_AFLAGS+= -D WIN DASM_AFLAGS+= -D WIN
endif endif
ifeq (x86,$(TARGET_LJARCH))
ifneq (,$(findstring __SSE2__ 1,$(TARGET_TESTARCH)))
DASM_AFLAGS+= -D SSE
endif
else
ifeq (x64,$(TARGET_LJARCH)) ifeq (x64,$(TARGET_LJARCH))
DASM_ARCH= x86 DASM_ARCH= x86
else else
@ -423,7 +415,6 @@ ifeq (ppc,$(TARGET_LJARCH))
endif endif
endif endif
endif endif
endif
DASM_FLAGS= $(DASM_XFLAGS) $(DASM_AFLAGS) DASM_FLAGS= $(DASM_XFLAGS) $(DASM_AFLAGS)
DASM_DASC= vm_$(DASM_ARCH).dasc DASM_DASC= vm_$(DASM_ARCH).dasc

20
src/lib_jit.c
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@ -538,18 +538,14 @@ static uint32_t jit_cpudetect(lua_State *L)
uint32_t features[4]; uint32_t features[4];
if (lj_vm_cpuid(0, vendor) && lj_vm_cpuid(1, features)) { if (lj_vm_cpuid(0, vendor) && lj_vm_cpuid(1, features)) {
#if !LJ_HASJIT #if !LJ_HASJIT
#define JIT_F_CMOV 1
#define JIT_F_SSE2 2 #define JIT_F_SSE2 2
#endif #endif
flags |= ((features[3] >> 15)&1) * JIT_F_CMOV;
flags |= ((features[3] >> 26)&1) * JIT_F_SSE2; flags |= ((features[3] >> 26)&1) * JIT_F_SSE2;
#if LJ_HASJIT #if LJ_HASJIT
flags |= ((features[2] >> 0)&1) * JIT_F_SSE3; flags |= ((features[2] >> 0)&1) * JIT_F_SSE3;
flags |= ((features[2] >> 19)&1) * JIT_F_SSE4_1; flags |= ((features[2] >> 19)&1) * JIT_F_SSE4_1;
if (vendor[2] == 0x6c65746e) { /* Intel. */ if (vendor[2] == 0x6c65746e) { /* Intel. */
if ((features[0] & 0x0ff00f00) == 0x00000f00) /* P4. */ if ((features[0] & 0x0fff0ff0) == 0x000106c0) /* Atom. */
flags |= JIT_F_P4; /* Currently unused. */
else if ((features[0] & 0x0fff0ff0) == 0x000106c0) /* Atom. */
flags |= JIT_F_LEA_AGU; flags |= JIT_F_LEA_AGU;
} else if (vendor[2] == 0x444d4163) { /* AMD. */ } else if (vendor[2] == 0x444d4163) { /* AMD. */
uint32_t fam = (features[0] & 0x0ff00f00); uint32_t fam = (features[0] & 0x0ff00f00);
@ -562,14 +558,8 @@ static uint32_t jit_cpudetect(lua_State *L)
} }
/* Check for required instruction set support on x86 (unnecessary on x64). */ /* Check for required instruction set support on x86 (unnecessary on x64). */
#if LJ_TARGET_X86 #if LJ_TARGET_X86
#if !defined(LUAJIT_CPU_NOCMOV)
if (!(flags & JIT_F_CMOV))
luaL_error(L, "CPU not supported");
#endif
#if defined(LUAJIT_CPU_SSE2)
if (!(flags & JIT_F_SSE2)) if (!(flags & JIT_F_SSE2))
luaL_error(L, "CPU does not support SSE2 (recompile without -DLUAJIT_CPU_SSE2)"); luaL_error(L, "CPU with SSE2 required");
#endif
#endif #endif
#elif LJ_TARGET_ARM #elif LJ_TARGET_ARM
#if LJ_HASJIT #if LJ_HASJIT
@ -631,10 +621,6 @@ static void jit_init(lua_State *L)
uint32_t flags = jit_cpudetect(L); uint32_t flags = jit_cpudetect(L);
#if LJ_HASJIT #if LJ_HASJIT
jit_State *J = L2J(L); jit_State *J = L2J(L);
#if LJ_TARGET_X86
/* Silently turn off the JIT compiler on CPUs without SSE2. */
if ((flags & JIT_F_SSE2))
#endif
J->flags = flags | JIT_F_ON | JIT_F_OPT_DEFAULT; J->flags = flags | JIT_F_ON | JIT_F_OPT_DEFAULT;
memcpy(J->param, jit_param_default, sizeof(J->param)); memcpy(J->param, jit_param_default, sizeof(J->param));
lj_dispatch_update(G(L)); lj_dispatch_update(G(L));
@ -645,6 +631,7 @@ static void jit_init(lua_State *L)
LUALIB_API int luaopen_jit(lua_State *L) LUALIB_API int luaopen_jit(lua_State *L)
{ {
jit_init(L);
lua_pushliteral(L, LJ_OS_NAME); lua_pushliteral(L, LJ_OS_NAME);
lua_pushliteral(L, LJ_ARCH_NAME); lua_pushliteral(L, LJ_ARCH_NAME);
lua_pushinteger(L, LUAJIT_VERSION_NUM); lua_pushinteger(L, LUAJIT_VERSION_NUM);
@ -657,7 +644,6 @@ LUALIB_API int luaopen_jit(lua_State *L)
LJ_LIB_REG(L, "jit.opt", jit_opt); LJ_LIB_REG(L, "jit.opt", jit_opt);
#endif #endif
L->top -= 2; L->top -= 2;
jit_init(L);
return 1; return 1;
} }

2
src/lj_asm.c
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@ -1730,7 +1730,7 @@ static void asm_setup_regsp(ASMState *as)
break; break;
case IR_FPMATH: case IR_FPMATH:
#if LJ_TARGET_X86ORX64 #if LJ_TARGET_X86ORX64
if (ir->op2 == IRFPM_EXP2) { /* May be joined to lj_vm_pow_sse. */ if (ir->op2 == IRFPM_EXP2) { /* May be joined to pow. */
ir->prev = REGSP_HINT(RID_XMM0); ir->prev = REGSP_HINT(RID_XMM0);
#if !LJ_64 #if !LJ_64
if (as->evenspill < 4) /* Leave room for 16 byte scratch area. */ if (as->evenspill < 4) /* Leave room for 16 byte scratch area. */

18
src/lj_jit.h
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@ -14,18 +14,16 @@
/* CPU-specific JIT engine flags. */ /* CPU-specific JIT engine flags. */
#if LJ_TARGET_X86ORX64 #if LJ_TARGET_X86ORX64
#define JIT_F_CMOV 0x00000010 #define JIT_F_SSE2 0x00000010
#define JIT_F_SSE2 0x00000020 #define JIT_F_SSE3 0x00000020
#define JIT_F_SSE3 0x00000040 #define JIT_F_SSE4_1 0x00000040
#define JIT_F_SSE4_1 0x00000080 #define JIT_F_PREFER_IMUL 0x00000080
#define JIT_F_P4 0x00000100 #define JIT_F_SPLIT_XMM 0x00000100
#define JIT_F_PREFER_IMUL 0x00000200 #define JIT_F_LEA_AGU 0x00000200
#define JIT_F_SPLIT_XMM 0x00000400
#define JIT_F_LEA_AGU 0x00000800
/* Names for the CPU-specific flags. Must match the order above. */ /* Names for the CPU-specific flags. Must match the order above. */
#define JIT_F_CPU_FIRST JIT_F_CMOV #define JIT_F_CPU_FIRST JIT_F_SSE2
#define JIT_F_CPUSTRING "\4CMOV\4SSE2\4SSE3\6SSE4.1\2P4\3AMD\2K8\4ATOM" #define JIT_F_CPUSTRING "\4SSE2\4SSE3\6SSE4.1\3AMD\2K8\4ATOM"
#elif LJ_TARGET_ARM #elif LJ_TARGET_ARM
#define JIT_F_ARMV6_ 0x00000010 #define JIT_F_ARMV6_ 0x00000010
#define JIT_F_ARMV6T2_ 0x00000020 #define JIT_F_ARMV6T2_ 0x00000020

4
src/lj_vm.h
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@ -49,12 +49,14 @@ LJ_ASMF void lj_vm_exit_handler(void);
LJ_ASMF void lj_vm_exit_interp(void); LJ_ASMF void lj_vm_exit_interp(void);
/* Internal math helper functions. */ /* Internal math helper functions. */
#if LJ_TARGET_X86ORX64 || LJ_TARGET_PPC #if LJ_TARGET_PPC
#define lj_vm_floor floor #define lj_vm_floor floor
#define lj_vm_ceil ceil #define lj_vm_ceil ceil
#else #else
LJ_ASMF double lj_vm_floor(double); LJ_ASMF double lj_vm_floor(double);
#if !LJ_TARGET_X86ORX64
LJ_ASMF double lj_vm_ceil(double); LJ_ASMF double lj_vm_ceil(double);
#endif
#if LJ_TARGET_ARM #if LJ_TARGET_ARM
LJ_ASMF double lj_vm_floor_sf(double); LJ_ASMF double lj_vm_floor_sf(double);
LJ_ASMF double lj_vm_ceil_sf(double); LJ_ASMF double lj_vm_ceil_sf(double);

1
src/msvcbuild.bat
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@ -35,6 +35,7 @@ if exist minilua.exe.manifest^
@if errorlevel 8 goto :X64 @if errorlevel 8 goto :X64
@set DASMFLAGS=-D WIN -D JIT -D FFI @set DASMFLAGS=-D WIN -D JIT -D FFI
@set LJARCH=x86 @set LJARCH=x86
@set LJCOMPILE=%LJCOMPILE% /arch:SSE2
:X64 :X64
minilua %DASM% -LN %DASMFLAGS% -o host\buildvm_arch.h vm_x86.dasc minilua %DASM% -LN %DASMFLAGS% -o host\buildvm_arch.h vm_x86.dasc
@if errorlevel 1 goto :BAD @if errorlevel 1 goto :BAD

655
src/vm_x86.dasc
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