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Merge branch 'master' into v2.1

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This commit is contained in:
Mike Pall 2023-09-09 23:20:57 +02:00
commit 566532b807
2 changed files with 14 additions and 4 deletions
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2
src/Makefile
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@ -233,7 +233,7 @@ TARGET_ALDFLAGS= $(LDOPTIONS) $(TARGET_XLDFLAGS) $(TARGET_FLAGS) $(TARGET_LDFLAG
TARGET_ASHLDFLAGS= $(LDOPTIONS) $(TARGET_XSHLDFLAGS) $(TARGET_FLAGS) $(TARGET_SHLDFLAGS) TARGET_ASHLDFLAGS= $(LDOPTIONS) $(TARGET_XSHLDFLAGS) $(TARGET_FLAGS) $(TARGET_SHLDFLAGS)
TARGET_ALIBS= $(TARGET_XLIBS) $(LIBS) $(TARGET_LIBS) TARGET_ALIBS= $(TARGET_XLIBS) $(LIBS) $(TARGET_LIBS)
TARGET_TESTARCH=$(shell $(TARGET_CC) $(TARGET_TCFLAGS) -E lj_arch.h -dM) TARGET_TESTARCH:=$(shell $(TARGET_CC) $(TARGET_TCFLAGS) -E lj_arch.h -dM)
ifneq (,$(findstring LJ_TARGET_X64 ,$(TARGET_TESTARCH))) ifneq (,$(findstring LJ_TARGET_X64 ,$(TARGET_TESTARCH)))
TARGET_LJARCH= x64 TARGET_LJARCH= x64
else else

16
src/lj_arch.h
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@ -66,7 +66,7 @@
#elif defined(__mips__) || defined(__mips) || defined(__MIPS__) || defined(__MIPS) #elif defined(__mips__) || defined(__mips) || defined(__MIPS__) || defined(__MIPS)
#define LUAJIT_TARGET LUAJIT_ARCH_MIPS32 #define LUAJIT_TARGET LUAJIT_ARCH_MIPS32
#else #else
#error "No support for this architecture (yet)" #error "Architecture not supported (in this version), see: https://luajit.org/status.html#architectures"
#endif #endif
#endif #endif
@ -237,7 +237,7 @@
#define LJ_TARGET_UNIFYROT 2 /* Want only IR_BROR. */ #define LJ_TARGET_UNIFYROT 2 /* Want only IR_BROR. */
#define LJ_ARCH_NUMMODE LJ_NUMMODE_DUAL #define LJ_ARCH_NUMMODE LJ_NUMMODE_DUAL
#if __ARM_ARCH == 8 || __ARM_ARCH_8__ || __ARM_ARCH_8A__ #if __ARM_ARCH >= 8 || __ARM_ARCH_8__ || __ARM_ARCH_8A__
#define LJ_ARCH_VERSION 80 #define LJ_ARCH_VERSION 80
#elif __ARM_ARCH == 7 || __ARM_ARCH_7__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH_7S__ || __ARM_ARCH_7VE__ #elif __ARM_ARCH == 7 || __ARM_ARCH_7__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH_7S__ || __ARM_ARCH_7VE__
#define LJ_ARCH_VERSION 70 #define LJ_ARCH_VERSION 70
@ -331,6 +331,7 @@
#define LJ_ARCH_NOFFI 1 #define LJ_ARCH_NOFFI 1
#elif LJ_ARCH_BITS == 64 #elif LJ_ARCH_BITS == 64
#error "No support for PPC64" #error "No support for PPC64"
#undef LJ_TARGET_PPC
#endif #endif
#if _ARCH_PWR7 #if _ARCH_PWR7
@ -490,36 +491,45 @@
#elif LJ_TARGET_ARM #elif LJ_TARGET_ARM
#if defined(__ARMEB__) #if defined(__ARMEB__)
#error "No support for big-endian ARM" #error "No support for big-endian ARM"
#undef LJ_TARGET_ARM
#endif #endif
#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ #if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__
#error "No support for Cortex-M CPUs" #error "No support for Cortex-M CPUs"
#undef LJ_TARGET_ARM
#endif #endif
#if !(__ARM_EABI__ || LJ_TARGET_IOS) #if !(__ARM_EABI__ || LJ_TARGET_IOS)
#error "Only ARM EABI or iOS 3.0+ ABI is supported" #error "Only ARM EABI or iOS 3.0+ ABI is supported"
#undef LJ_TARGET_ARM
#endif #endif
#elif LJ_TARGET_ARM64 #elif LJ_TARGET_ARM64
#if defined(_ILP32) #if defined(_ILP32)
#error "No support for ILP32 model on ARM64" #error "No support for ILP32 model on ARM64"
#undef LJ_TARGET_ARM64
#endif #endif
#elif LJ_TARGET_PPC #elif LJ_TARGET_PPC
#if defined(_LITTLE_ENDIAN) && (!defined(_BYTE_ORDER) || (_BYTE_ORDER == _LITTLE_ENDIAN)) #if defined(_LITTLE_ENDIAN) && (!defined(_BYTE_ORDER) || (_BYTE_ORDER == _LITTLE_ENDIAN))
#error "No support for little-endian PPC32" #error "No support for little-endian PPC32"
#undef LJ_TARGET_PPC
#endif #endif
#if defined(__NO_FPRS__) && !defined(_SOFT_FLOAT) #if defined(__NO_FPRS__) && !defined(_SOFT_FLOAT)
#error "No support for PPC/e500 anymore (use LuaJIT 2.0)" #error "No support for PPC/e500, use LuaJIT 2.0"
#undef LJ_TARGET_PPC
#endif #endif
#elif LJ_TARGET_MIPS32 #elif LJ_TARGET_MIPS32
#if !((defined(_MIPS_SIM_ABI32) && _MIPS_SIM == _MIPS_SIM_ABI32) || (defined(_ABIO32) && _MIPS_SIM == _ABIO32)) #if !((defined(_MIPS_SIM_ABI32) && _MIPS_SIM == _MIPS_SIM_ABI32) || (defined(_ABIO32) && _MIPS_SIM == _ABIO32))
#error "Only o32 ABI supported for MIPS32" #error "Only o32 ABI supported for MIPS32"
#undef LJ_TARGET_MIPS
#endif #endif
#if LJ_TARGET_MIPSR6 #if LJ_TARGET_MIPSR6
/* Not that useful, since most available r6 CPUs are 64 bit. */ /* Not that useful, since most available r6 CPUs are 64 bit. */
#error "No support for MIPS32R6" #error "No support for MIPS32R6"
#undef LJ_TARGET_MIPS
#endif #endif
#elif LJ_TARGET_MIPS64 #elif LJ_TARGET_MIPS64
#if !((defined(_MIPS_SIM_ABI64) && _MIPS_SIM == _MIPS_SIM_ABI64) || (defined(_ABI64) && _MIPS_SIM == _ABI64)) #if !((defined(_MIPS_SIM_ABI64) && _MIPS_SIM == _MIPS_SIM_ABI64) || (defined(_ABI64) && _MIPS_SIM == _ABI64))
/* MIPS32ON64 aka n32 ABI support might be desirable, but difficult. */ /* MIPS32ON64 aka n32 ABI support might be desirable, but difficult. */
#error "Only n64 ABI supported for MIPS64" #error "Only n64 ABI supported for MIPS64"
#undef LJ_TARGET_MIPS
#endif #endif
#endif #endif
#endif #endif