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Update vm_s390x.dasc

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Referred arm dasc file have created slots wherein i have to replace them with s390x registers and instructions
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ketank-new 2016-11-17 14:58:17 +05:30 committed by GitHub
parent c36895a872
commit 4aa1099d6a
1 changed files with 101 additions and 118 deletions
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219
src/vm_s390x.dasc
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@ -15,81 +15,85 @@
| |
|// Fixed register assignments for the interpreter. |// Fixed register assignments for the interpreter.
|// This is very fragile and has many dependencies. Caveat emptor. |// This is very fragile and has many dependencies. Caveat emptor.
|.define BASE, edx // Not C callee-save, refetched anyway. .define BASE, // Base of current Lua stack frame.
|.if not X64 |.define KBASE, // Constants of current Lua function.
|.define KBASE, edi // Must be C callee-save. |.define PC, // Next PC.
|.define KBASEa, KBASE |.define GLREG, // Global state.
|.define PC, esi // Must be C callee-save. |.define LREG, // Register holding lua_State (also in SAVE_L).
|.define PCa, PC |.define TISNUM, // Constant LJ_TISNUM << 47.
|.define DISPATCH, ebx // Must be C callee-save. |.define TISNUMhi, // Constant LJ_TISNUM << 15.
|.elif X64WIN |.define TISNIL, // Constant -1LL.
|.define KBASE, edi // Must be C callee-save. |.define fp, // Yes, we have to maintain a frame pointer.
|.define KBASEa, rdi
|.define PC, esi // Must be C callee-save.
|.define PCa, rsi
|.define DISPATCH, ebx // Must be C callee-save.
|.else
|.define KBASE, r15d // Must be C callee-save.
|.define KBASEa, r15
|.define PC, ebx // Must be C callee-save.
|.define PCa, rbx
|.define DISPATCH, r14d // Must be C callee-save.
|.endif
| |
|.define RA, ecx |// The following temporaries are not saved across C calls, except for RA/RC.
|.define RAH, ch |.define RA,
|.define RAL, cl |.define RC,
|.define RB, ebp // Must be ebp (C callee-save). |.define RB,
|.define RC, eax // Must be eax. |.define RAw,
|.define RCW, ax |.define RCw,
|.define RCH, ah |.define RBw,
|.define RCL, al |.define INS,
|.define OP, RB |.define INSw,
|.define RD, RC |.define ITYPE,
|.define RDW, RCW |.define TMP0,
|.define RDL, RCL |.define TMP1,
|.if X64 |.define TMP2,
|.define RAa, rcx |.define TMP3,
|.define RBa, rbp |.define TMP0w,
|.define RCa, rax |.define TMP1w,
|.define RDa, rax |.define TMP2w,
|.else |.define TMP3w,
|.define RAa, RA
|.define RBa, RB
|.define RCa, RC
|.define RDa, RD
|.endif
| |
|.if not X64 |// Calling conventions. Also used as temporaries.
|.define FCARG1, ecx // x86 fastcall arguments. |.define CARG1,
|.define FCARG2, edx |.define CARG2,
|.elif X64WIN |.define CARG3,
|.define CARG1, rcx // x64/WIN64 C call arguments. |.define CARG4,
|.define CARG2, rdx |.define CARG5,
|.define CARG3, r8 |.define CARG1w,
|.define CARG4, r9 |.define CARG2w,
|.define CARG1d, ecx |.define CARG3w,
|.define CARG2d, edx |.define CARG4w,
|.define CARG3d, r8d |.define CARG5w,
|.define CARG4d, r9d |
|.define FCARG1, CARG1d // Upwards compatible to x86 fastcall. |.define FARG1,
|.define FCARG2, CARG2d |.define FARG2,
|.else |
|.define CARG1, rdi // x64/POSIX C call arguments. |.define CRET1,
|.define CARG2, rsi |.define CRET1w,
|.define CARG3, rdx |// Stack layout while in interpreter. Must match with lj_frame.h.
|.define CARG4, rcx |
|.define CARG5, r8 |.define CFRAME_SPACE, 208
|.define CARG6, r9 |//----- 16 byte aligned, <-- sp entering interpreter
|.define CARG1d, edi |// Unused [sp, #204] // 32 bit values
|.define CARG2d, esi |.define SAVE_NRES,
|.define CARG3d, edx |.define SAVE_ERRF,
|.define CARG4d, ecx |.define SAVE_MULTRES,
|.define CARG5d, r8d |.define TMPD,
|.define CARG6d, r9d |.define SAVE_L,
|.define FCARG1, CARG1d // Simulate x86 fastcall. |.define SAVE_PC,
|.define FCARG2, CARG2d |.define SAVE_CFRAME,
|.endif |.define SAVE_FPR_,
|.define SAVE_GPR_,
|.define SAVE_LR,
|.define SAVE_FP,
|//----- 16 byte aligned, <-- sp while in interpreter.
|
|.define TMPDofs,
|
|.macro save_, gpr1, gpr2, fpr1, fpr2
]
|.endmacro
|.macro rest_, gpr1, gpr2, fpr1, fpr2
]
|.endmacro
|
|.macro saveregs
|.endmacro
|.macro restoreregs
|.endmacro
| |
|// Type definitions. Some of these are only used for documentation. |// Type definitions. Some of these are only used for documentation.
|.type L, lua_State |.type L, lua_State
@ -111,22 +115,16 @@
|//----------------------------------------------------------------------- |//-----------------------------------------------------------------------
|.define CFRAME_SPACE, aword*9 // Delta for esp (see <--). |.define CFRAME_SPACE, aword*9 // Delta for esp (see <--).
|.macro saveregs_ |.macro saveregs_
| push edi; push esi; push ebx
| push extern lj_err_unwind_win
| fs; push dword [0]
| fs; mov [0], esp
| sub esp, CFRAME_SPACE
|.endmacro |.endmacro
|.macro restoreregs |.macro restoreregs
| add esp, CFRAME_SPACE
| fs; pop dword [0]
| pop edi // Short for esp += 4.
| pop ebx; pop esi; pop edi; pop ebp
|.endmacro |.endmacro
| |
|.macro saveregs |.macro saveregs
| push ebp; saveregs_
|.endmacro |.endmacro
|.define SAVE_ERRF, aword [esp+aword*15] // vm_pcall/vm_cpcall only. |.define SAVE_ERRF, aword [esp+aword*15] // vm_pcall/vm_cpcall only.
|.define SAVE_NRES, aword [esp+aword*14] |.define SAVE_NRES, aword [esp+aword*14]
|.define SAVE_CFRAME, aword [esp+aword*13] |.define SAVE_CFRAME, aword [esp+aword*13]
@ -164,18 +162,14 @@
|.macro ins_A; .endmacro |.macro ins_A; .endmacro
|.macro ins_AD; .endmacro |.macro ins_AD; .endmacro
|.macro ins_AJ; .endmacro |.macro ins_AJ; .endmacro
|.macro ins_ABC; movzx RB, RCH; movzx RC, RCL; .endmacro |.macro ins_ABC; .endmacro
|.macro ins_AB_; movzx RB, RCH; .endmacro |.macro ins_AB_; .endmacro
|.macro ins_A_C; movzx RC, RCL; .endmacro |.macro ins_A_C; .endmacro
|.macro ins_AND; not RDa; .endmacro |.macro ins_AND; .endmacro
| |
|// Instruction decode+dispatch. Carefully tuned (nope, lodsd is not faster). |// Instruction decode+dispatch. Carefully tuned (nope, lodsd is not faster).
|.macro ins_NEXT |.macro ins_NEXT
| mov RC, [PC]
| movzx RA, RCH
| movzx OP, RCL
| add PC, 4
| shr RC, 16
|.endmacro |.endmacro
| |
|// Instruction footer. |// Instruction footer.
@ -220,11 +214,11 @@
|//----------------------------------------------------------------------- |//-----------------------------------------------------------------------
| |
|// Macros to test operand types. |// Macros to test operand types.
|.macro checktp, reg, tp; cmp dword [BASE+reg*8+4], tp; .endmacro |.macro checktp, .endmacro
|.macro checknum, reg, target; checktp reg, LJ_TISNUM; jae target; .endmacro |.macro checknum, .endmacro
|.macro checkint, reg, target; checktp reg, LJ_TISNUM; jne target; .endmacro |.macro checkint, .endmacro
|.macro checkstr, reg, target; checktp reg, LJ_TSTR; jne target; .endmacro |.macro checkstr, .endmacro
|.macro checktab, reg, target; checktp reg, LJ_TTAB; jne target; .endmacro |.macro checktab, .endmacro
| |
|// These operands must be used with movzx. |// These operands must be used with movzx.
|.define PC_OP, byte [PC-4] |.define PC_OP, byte [PC-4]
@ -234,7 +228,7 @@
|.define PC_RD, word [PC-2] |.define PC_RD, word [PC-2]
| |
|.macro branchPC, reg |.macro branchPC, reg
| lea PC, [PC+reg*4-BCBIAS_J*4]
|.endmacro |.endmacro
| |
|// Assumes DISPATCH is relative to GL. |// Assumes DISPATCH is relative to GL.
@ -245,24 +239,16 @@
| |
|// Decrement hashed hotcount and trigger trace recorder if zero. |// Decrement hashed hotcount and trigger trace recorder if zero.
|.macro hotloop, reg |.macro hotloop, reg
| mov reg, PC
| shr reg, 1
| and reg, HOTCOUNT_PCMASK
| sub word [DISPATCH+reg+GG_DISP2HOT], HOTCOUNT_LOOP
| jb ->vm_hotloop
|.endmacro |.endmacro
| |
|.macro hotcall, reg |.macro hotcall, reg
| mov reg, PC
| shr reg, 1
| and reg, HOTCOUNT_PCMASK
| sub word [DISPATCH+reg+GG_DISP2HOT], HOTCOUNT_CALL
| jb ->vm_hotcall
|.endmacro |.endmacro
| |
|// Set current VM state. |// Set current VM state.
|.macro set_vmstate, st |.macro set_vmstate, st
| mov dword [DISPATCH+DISPATCH_GL(vmstate)], ~LJ_VMST_..st
|.endmacro |.endmacro
| |
| |
@ -270,27 +256,24 @@
| |
| |
|.macro sseconst_sign, reg, tmp // Synthesize sign mask. |.macro sseconst_sign, reg, tmp // Synthesize sign mask.
| sseconst_hi reg, tmp, 80000000 |
|.endmacro |.endmacro
|.macro sseconst_1, reg, tmp // Synthesize 1.0. |.macro sseconst_1, reg, tmp // Synthesize 1.0.
| sseconst_hi reg, tmp, 3ff00000 |
|.endmacro |.endmacro
|.macro sseconst_m1, reg, tmp // Synthesize -1.0. |.macro sseconst_m1, reg, tmp // Synthesize -1.0.
| sseconst_hi reg, tmp, bff00000 |
|.endmacro |.endmacro
|.macro sseconst_2p52, reg, tmp // Synthesize 2^52. |.macro sseconst_2p52, reg, tmp // Synthesize 2^52.
| sseconst_hi reg, tmp, 43300000 |
|.endmacro |.endmacro
|.macro sseconst_tobit, reg, tmp // Synthesize 2^52 + 2^51. |.macro sseconst_tobit, reg, tmp // Synthesize 2^52 + 2^51.
| sseconst_hi reg, tmp, 43380000 |
|.endmacro |.endmacro
| |
|// Move table write barrier back. Overwrites reg. |// Move table write barrier back. Overwrites reg.
|.macro barrierback, tab, reg |.macro barrierback, tab, reg
| and byte tab->marked, (uint8_t)~LJ_GC_BLACK // black2gray(tab)
| mov reg, [DISPATCH+DISPATCH_GL(gc.grayagain)]
| mov [DISPATCH+DISPATCH_GL(gc.grayagain)], tab
| mov tab->gclist, reg
|.endmacro |.endmacro
| |
|//----------------------------------------------------------------------- |//-----------------------------------------------------------------------