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ARM64: Add missing ldrb/strb instructions to disassembler.

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Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
This commit is contained in:
Mike Pall 2016-12-07 18:34:10 +01:00
parent 22511fbe2b
commit 48b00297b3
1 changed files with 9 additions and 5 deletions
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14
src/jit/dis_arm64.lua
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@ -411,15 +411,19 @@ local map_lsriro = {
shift = 26, mask = 1, shift = 26, mask = 1,
[0] = { [0] = {
shift = 30, mask = 3, shift = 30, mask = 3,
[1] = { [0] = {
shift = 22, mask = 3, shift = 22, mask = 3,
[0] = "strhDwO", "ldrhDwO", "ldrshDwO", "ldrshDxO" [0] = "strbDwO", "ldrbDwO", "ldrsbDxO", "ldrsbDwO"
}, },
[2] = { {
shift = 22, mask = 3,
[0] = "strhDwO", "ldrhDwO", "ldrshDxO", "ldrshDwO"
},
{
shift = 22, mask = 3, shift = 22, mask = 3,
[0] = "strDwO", "ldrDwO", "ldrswDxO" [0] = "strDwO", "ldrDwO", "ldrswDxO"
}, },
[3] = { {
shift = 22, mask = 3, shift = 22, mask = 3,
[0] = "strDxO", "ldrDxO" [0] = "strDxO", "ldrDxO"
} }
@ -982,7 +986,7 @@ local function disass_ins(ctx)
local sz = band(rshift(op, 30), 3) local sz = band(rshift(op, 30), 3)
-- extension to be applied -- extension to be applied
if opt == 3 then if opt == 3 then
if s == 0 then x = nil if s == 0 then x = x.."]"
else x = x..", lsl #"..sz.."]" end else x = x..", lsl #"..sz.."]" end
elseif opt == 2 or opt == 6 or opt == 7 then elseif opt == 2 or opt == 6 or opt == 7 then
if s == 0 then x = x..", "..map_extend[opt].."]" if s == 0 then x = x..", "..map_extend[opt].."]"