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ppc64 fixes.
This commit is contained in:
parent
f9b470df94
commit
2bf1b24e25
@ -30,8 +30,13 @@ enum {
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/* Calling conventions. */
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RID_RET = RID_R3,
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#if LJ_LE
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RID_RETHI = RID_R4,
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RID_RETLO = RID_R3,
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#else
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RID_RETHI = RID_R3,
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RID_RETLO = RID_R4,
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#endif
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RID_FPRET = RID_F1,
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/* These definitions must match with the *.dasc file(s): */
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222
src/vm_ppc.dasc
222
src/vm_ppc.dasc
@ -35,14 +35,14 @@
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|.macro stp, a, b; std a, b; .endmacro
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|.macro stpx, a, b, c; stdx a, b, c; .endmacro
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|.define decode_OPP, decode_OP8
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|.define WORD_SIZE, 8
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|.define PSIZE, 8
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|.else
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|.macro lpx, a, b, c; lwzx a, b, c; .endmacro
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|.macro lp, a, b; lwz a, b; .endmacro
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|.macro stp, a, b; stw a, b; .endmacro
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|.macro stpx, a, b, c; stwx a, b, c; .endmacro
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|.define decode_OPP, decode_OP4
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|.define WORD_SIZE, 4
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|.define PSIZE, 4
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|.endif
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|
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|// Convenience macros for TOC handling.
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@ -80,29 +80,6 @@
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|.endif
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|.endmacro
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|
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|.macro clrso, reg
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|.if PPE
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| li reg, 0
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| mtxer reg
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|.else
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| mcrxr cr0
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|.endif
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|.endmacro
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|
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|.macro checkov, reg, noov
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|.if PPE
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| mfxer reg
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| add reg, reg, reg
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| cmpwi reg, 0
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| li reg, 0
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| mtxer reg
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| bgey noov
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|.else
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| mcrxr cr0
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| bley noov
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|.endif
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|.endmacro
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|
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|//-----------------------------------------------------------------------
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|
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|// Fixed register assignments for the interpreter.
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@ -149,6 +126,12 @@
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|
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|.define FARG1, f1
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|.define FARG2, f2
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|.define FARG3, f3
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|.define FARG4, f4
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|.define FARG5, f5
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|.define FARG6, f6
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|.define FARG7, f7
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|.define FARG8, f8
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|
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|.define CRET1, r3
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|.define CRET2, r4
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@ -205,15 +188,15 @@
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|.define SAVE_FPR_, 192 // .. 192+18*8: 64 bit FPR saves.
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|.define SAVE_GPR_, 48 // .. 48+18*8: 64 bit GPR saves.
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|.if ENDIAN_LE
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|.define TMPD_HI, 44(sp) // \ Link editor temp (ABI mandated).
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|.define TMPD_LO, 40(sp) // /
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|.define TONUM_HI, 36(sp) // \ Compiler temp (ABI mandated).
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|.define TONUM_LO, 32(sp) // /
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|.define TMPD_HI, 44(sp)
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|.define TMPD_LO, 40(sp)
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|.define TONUM_HI, 36(sp)
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|.define TONUM_LO, 32(sp)
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|.else
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|.define TMPD_LO, 44(sp) // \ Link editor temp (ABI mandated).
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|.define TMPD_HI, 40(sp) // /
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|.define TONUM_LO, 36(sp) // \ Compiler temp (ABI mandated).
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|.define TONUM_HI, 32(sp) // /
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|.define TMPD_LO, 44(sp)
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|.define TMPD_HI, 40(sp)
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|.define TONUM_LO, 36(sp)
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|.define TONUM_HI, 32(sp)
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|.endif
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|.define SAVE_TOC, 24(sp) // TOC save area.
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|// Next frame lr: 16(sp)
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@ -230,6 +213,8 @@
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|.define TONUM_D, TONUM_HI
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|.endif
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|
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|.define EXIT_OFFSET, 32
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|
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|.else
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|// 508(sp) // \ 32 bit C frame info.
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@ -272,6 +257,8 @@
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|.define TONUM_D, TONUM_HI
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|.endif
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|.define EXIT_OFFSET, 112
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|
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|.endif
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|.else
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@ -312,6 +299,8 @@
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|.define TONUM_D, TONUM_HI
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|.endif
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|.define EXIT_OFFSET, 16
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|
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|.endif
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|.macro save_, reg
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@ -1496,8 +1485,8 @@ static void build_subroutines(BuildCtx *ctx)
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| .gpr64 extsw CARG3, CARG3
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|.if P64
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| li TMP0, LJ_TNUMX
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| srawi TMP3, CARG1, 15
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| subfc TMP1, TMP0, CARG1
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| srawi TMP3, CARG3, 15
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| subfc TMP1, TMP0, CARG3
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|.else
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| subfc TMP0, TISNUM, CARG3
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|.endif
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@ -1592,7 +1581,12 @@ static void build_subroutines(BuildCtx *ctx)
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| lwz CARG1, WORD_HI(BASE)
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| lwz TAB:CARG2, WORD_LO(BASE)
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| blt ->fff_fallback
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| stwx TISNIL, BASE_HI, NARGS8:RC // Set missing 2nd arg to nil.
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|.if ENDIAN_LE
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| add TMP1, BASE, NARGS8:RC
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| stw TISNIL, WORD_HI(TMP1) // Set missing 2nd arg to nil.
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|.else
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| stwx TISNIL, BASE, NARGS8:RC // Set missing 2nd arg to nil.
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|.endif
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| checktab CARG1
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| lwz PC, FRAME_PC(BASE)
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| bne ->fff_fallback
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@ -2208,7 +2202,12 @@ static void build_subroutines(BuildCtx *ctx)
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| .ffunc_n name
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| li TMP1, 8
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|1:
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| lwzx CARG2, BASE_HI, TMP1
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|.if ENDIAN_LE
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| add CARG2, BASE, TMP1
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| lwz CARG2, WORD_HI(CARG2)
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|.else
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| lwzx CARG2, BASE, TMP1
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|.endif
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| lfdx FARG2, BASE, TMP1
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| cmplw cr1, TMP1, NARGS8:RC
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| checknum CARG2
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@ -2734,7 +2733,12 @@ static void build_subroutines(BuildCtx *ctx)
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| b ->cont_nop
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|9:
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| stwx TISNIL, BASE_HI, RC
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|.if ENDIAN_LE
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| addi BASEP4, BASE, 4
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| stwx TISNIL, BASEP4, RC
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|.else
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| stwx TISNIL, BASE, RC
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|.endif
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| addi RC, RC, 8
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| b <3
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|.endif
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@ -2758,40 +2762,72 @@ static void build_subroutines(BuildCtx *ctx)
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|//-----------------------------------------------------------------------
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|
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|.macro savex_, a, b, c, d
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| stfd f..a, 16+a*8(sp)
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| stfd f..b, 16+b*8(sp)
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| stfd f..c, 16+c*8(sp)
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| stfd f..d, 16+d*8(sp)
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| stfd f..a, EXIT_OFFSET+a*8(sp)
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| stfd f..b, EXIT_OFFSET+b*8(sp)
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| stfd f..c, EXIT_OFFSET+c*8(sp)
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| stfd f..d, EXIT_OFFSET+d*8(sp)
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|.endmacro
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|.macro saver, a
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| stp r..a, EXIT_OFFSET+32*8+a*PSIZE(sp)
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|.endmacro
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|->vm_exit_handler:
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|.if JIT
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// XXX: endian
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| addi sp, sp, -(16+32*8+32*4)
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| stmw r2, 16+32*8+2*4(sp)
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| addi sp, TMP0, sp, -(EXIT_OFFSET+32*8+32*PSIZE)
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| saver 3 // CARG1
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| saver 4 // CARG2
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| saver 5 // CARG3
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| saver 17 // DISPATCH
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| addi DISPATCH, JGL, -GG_DISP2G-32768
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| li CARG2, ~LJ_VMST_EXIT
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| lwz CARG1, 16+32*8+32*4(sp) // Get stack chain.
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| lp CARG1, EXIT_OFFSET+32*8+32*PSIZE(sp) // Get stack chain.
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| stw CARG2, DISPATCH_GL(vmstate)(DISPATCH)
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| saver 2
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| saver 6
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| saver 7
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| saver 8
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| saver 9
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| saver 10
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| saver 11
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| saver 12
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| saver 13
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| savex_ 0,1,2,3
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| stw CARG1, 0(sp) // Store extended stack chain.
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| clrso TMP1
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| stp CARG1, 0(sp) // Store extended stack chain.
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| savex_ 4,5,6,7
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| addi CARG2, sp, 16+32*8+32*4 // Recompute original value of sp.
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| saver 14
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| saver 15
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| saver 16
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| saver 18
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| addi CARG2, sp, EXIT_OFFSET+32*8+32*PSIZE // Recompute original value of sp.
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| savex_ 8,9,10,11
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| stw CARG2, 16+32*8+1*4(sp) // Store sp in RID_SP.
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| stp CARG2, EXIT_OFFSET+32*8+1*PSIZE(sp) // Store sp in RID_SP.
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| savex_ 12,13,14,15
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| mflr CARG3
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| li TMP1, 0
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| savex_ 16,17,18,19
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| stw TMP1, 16+32*8+0*4(sp) // Clear RID_TMP.
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| stw TMP1, EXIT_OFFSET+32*8+0*PSIZE(sp) // Clear RID_TMP.
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| savex_ 20,21,22,23
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| lhz CARG4, 2(CARG3) // Load trace number.
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| savex_ 24,25,26,27
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| lwz L, DISPATCH_GL(cur_L)(DISPATCH)
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| savex_ 28,29,30,31
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| saver 19
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| saver 20
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| saver 21
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| saver 22
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| saver 23
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| saver 24
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| saver 25
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| saver 26
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| saver 27
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| saver 28
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| saver 29
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| saver 30
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| saver 31
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| sub CARG3, TMP0, CARG3 // Compute exit number.
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| lp BASE, DISPATCH_GL(jit_base)(DISPATCH)
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| lwz BASE, DISPATCH_GL(jit_base)(DISPATCH)
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| srwi CARG3, CARG3, 2
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| stp L, DISPATCH_J(L)(DISPATCH)
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| subi CARG3, CARG3, 2
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@ -2800,11 +2836,11 @@ static void build_subroutines(BuildCtx *ctx)
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| stw TMP1, DISPATCH_GL(jit_base)(DISPATCH)
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| addi CARG1, DISPATCH, GG_DISP2J
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| stw CARG3, DISPATCH_J(exitno)(DISPATCH)
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| addi CARG2, sp, 16
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| addi CARG2, sp, EXIT_OFFSET
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| bl extern lj_trace_exit // (jit_State *J, ExitState *ex)
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| // Returns MULTRES (unscaled) or negated error code.
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| lp TMP1, L->cframe
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| lwz TMP2, 0(sp)
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| lp TMP2, 0(sp)
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| lp BASE, L->base
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|.if GPR64
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| rldicr sp, TMP1, 0, 61
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@ -2812,13 +2848,12 @@ static void build_subroutines(BuildCtx *ctx)
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| rlwinm sp, TMP1, 0, 0, 29
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|.endif
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| lwz PC, SAVE_PC // Get SAVE_PC.
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| stw TMP2, 0(sp)
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| stp TMP2, 0(sp)
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| stw L, SAVE_L // Set SAVE_L (on-trace resume/yield).
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| b >1
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|.endif
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|->vm_exit_interp:
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|.if JIT
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// XXX: endian
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| // CARG1 = MULTRES or negated error code, BASE, PC and JGL set.
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| lwz L, SAVE_L
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| addi DISPATCH, JGL, -GG_DISP2G-32768
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@ -2859,14 +2894,14 @@ static void build_subroutines(BuildCtx *ctx)
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| decode_RA8 RA, INS
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| lpx TMP0, DISPATCH, TMP1
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| mtctr TMP0
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| cmplwi TMP1, BC_FUNCF*4 // Function header?
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| cmplwi TMP1, BC_FUNCF*PSIZE // Function header?
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| bge >2
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| decode_RB8 RB, INS
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| decode_RD8 RD, INS
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| decode_RC8 RC, INS
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| bctr
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|2:
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| cmplwi TMP1, (BC_FUNCC+2)*4 // Fast function?
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| cmplwi TMP1, (BC_FUNCC+2)*PSIZE // Fast function?
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| blt >3
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| // Check frame below fast function.
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| lwz TMP1, FRAME_PC(BASE)
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@ -2897,6 +2932,8 @@ static void build_subroutines(BuildCtx *ctx)
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|// NYI: Use internal implementations of floor, ceil, trunc.
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|
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|->vm_modi:
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| li TMP1, 0
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| mtxer TMP1
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| divwo. TMP0, CARG1, CARG2
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| bso >1
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|.if GPR64
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@ -2915,7 +2952,8 @@ static void build_subroutines(BuildCtx *ctx)
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| cmpwi CARG2, 0
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| li CARG1, 0
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| beqlr
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| clrso TMP0 // Clear SO for -2147483648 % -1 and return 0.
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| // Clear SO for -2147483648 % -1 and return 0.
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| crxor 4*cr0+so, 4*cr0+so, 4*cr0+so
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| blr
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|
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|//-----------------------------------------------------------------------
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@ -2961,7 +2999,11 @@ static void build_subroutines(BuildCtx *ctx)
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|//-- FFI helper functions -----------------------------------------------
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|//-----------------------------------------------------------------------
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|
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|// Handler for callback functions. Callback slot number in r12, g in r11.
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|// Handler for callback functions.
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|// 32-bit: Callback slot number in r12, g in r11.
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|// 64-bit v1: Callback slot number in bits 47+ of r11, g in 0-46, TOC in r2.
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|// 64-bit v2: Callback slot number in bits 2-11 of r12, g in r11,
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|// vm_ffi_callback in r2.
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|->vm_ffi_callback:
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|.if FFI
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|.type CTSTATE, CTState, PC
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@ -3115,7 +3157,7 @@ static void build_subroutines(BuildCtx *ctx)
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|1:
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| lpx TMP0, TMP1, CARG2
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| stpx TMP0, TMP2, CARG2
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| addic. CARG2, CARG2, -WORD_SIZE
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| addic. CARG2, CARG2, -PSIZE
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| bge <1
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|2:
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| bney cr1, >3
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@ -3166,6 +3208,12 @@ static void build_subroutines(BuildCtx *ctx)
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| .if GPR64
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| stfd FARG2, CCSTATE:TMP1->fpr[1]
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| .endif
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| .elfv2 stfd FARG3, CCSTATE:TMP1->fpr[2]
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| .elfv2 stfd FARG4, CCSTATE:TMP1->fpr[3]
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| .elfv2 stfd FARG5, CCSTATE:TMP1->fpr[4]
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| .elfv2 stfd FARG6, CCSTATE:TMP1->fpr[5]
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| .elfv2 stfd FARG7, CCSTATE:TMP1->fpr[6]
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| .elfv2 stfd FARG8, CCSTATE:TMP1->fpr[7]
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| mtlr TMP0
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| stp CARG3, CCSTATE:TMP1->gpr[2]
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| mr sp, r14
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@ -3624,6 +3672,9 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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| // RA = dst*8, RD = src*8
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| lwzx TMP1, BASE_HI, RD
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| lwzx TMP0, BASE_LO, RD
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|.if DUALNUM and not GPR64
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| mtxer ZERO
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|.endif
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| checknum TMP1
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|.if DUALNUM
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| bne >5
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@ -3635,7 +3686,6 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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|.else
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| nego. TMP0, TMP0
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| bso >4
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|1:
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|.endif
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| ins_next1
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| stwx TISNUM, BASE_HI, RA
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@ -3643,10 +3693,6 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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|3:
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| ins_next2
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|4:
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|.if not GPR64
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| // Potential overflow.
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| checkov TMP1, <1 // Ignore unrelated overflow.
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|.endif
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| lus TMP1, 0x41e0 // 2^31.
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| li TMP0, 0
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| b >7
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@ -3856,20 +3902,17 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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| .endif
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|| break;
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||}
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| mtxer ZERO
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| checknum cr1, TMP2
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| bne >5
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| bne cr1, >5
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| intins CARG1, CARG1, CARG2
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| bso >4
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|1:
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| ins_arithfallback bso
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| ins_next1
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| stwx TISNUM, BASE_HI, RA
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| stwx CARG1, BASE_LO, RA
|
||||
|2:
|
||||
| ins_next2
|
||||
|4: // Overflow.
|
||||
| checkov TMP0, <1 // Ignore unrelated overflow.
|
||||
| ins_arithfallback b
|
||||
|5: // FP variant.
|
||||
||if (vk == 1) {
|
||||
| lfd f15, 0(RB)
|
||||
@ -4017,6 +4060,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
||||
| slwi RD, RD, 13
|
||||
| srawi TMP1, RD, 31
|
||||
| xor TMP2, TMP1, RD
|
||||
| .gpr64 extsw RD, RD
|
||||
| sub TMP2, TMP2, TMP1 // TMP2 = abs(x)
|
||||
| cntlzw TMP3, TMP2
|
||||
| subfic TMP1, TMP3, 0x40d // TMP1 = exponent-1
|
||||
@ -4174,6 +4218,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
||||
| add CARG2, BASE, RA
|
||||
| bl extern lj_func_closeuv // (lua_State *L, TValue *level)
|
||||
| lp BASE, L->base
|
||||
| addi BASEP4, BASE, 4
|
||||
|1:
|
||||
| ins_next
|
||||
break;
|
||||
@ -4192,6 +4237,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
||||
| // Returns GCfuncL *.
|
||||
| lp BASE, L->base
|
||||
| li TMP0, LJ_TFUNC
|
||||
| addi BASEP4, BASE, 4
|
||||
| stwx TMP0, BASE_HI, RA
|
||||
| stwx LFUNC:CRET1, BASE_LO, RA
|
||||
| ins_next
|
||||
@ -4295,12 +4341,12 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
||||
|.endif
|
||||
| ble ->vmeta_tgetv // Integer key and in array part?
|
||||
| .if ENDIAN_LE
|
||||
| addi TMP3, TMP1, 4
|
||||
| lwzx TMP0, TMP3, TMP2
|
||||
| lfdux f14, TMP1, TMP2
|
||||
| lwz TMP0, WORD_HI(TMP1)
|
||||
| .else
|
||||
| lwzx TMP0, TMP1, TMP2
|
||||
| .endif
|
||||
| lfdx f14, TMP1, TMP2
|
||||
| .endif
|
||||
| checknil TMP0; beq >2
|
||||
|1:
|
||||
| ins_next1
|
||||
@ -4381,12 +4427,12 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
||||
| lwz TMP2, TAB:RB->array
|
||||
| cmplw TMP0, TMP1; bge ->vmeta_tgetb
|
||||
| .if ENDIAN_LE
|
||||
| addi TMP1, TMP2, 4
|
||||
| lwzx TMP1, TMP1, RC
|
||||
| lfdux f0, TMP2, RC
|
||||
| lwz TMP1, WORD_HI(TMP2)
|
||||
| .else
|
||||
| lwzx TMP1, TMP2, RC
|
||||
| .endif
|
||||
| lfdx f0, TMP2, RC
|
||||
| .endif
|
||||
| checknil TMP1; beq >5
|
||||
|1:
|
||||
| ins_next1
|
||||
@ -4883,9 +4929,17 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
||||
|5: // Despecialize bytecode if any of the checks fail.
|
||||
| li TMP0, BC_JMP
|
||||
| li TMP1, BC_ITERC
|
||||
| .if ENDIAN_LE
|
||||
| stb TMP0, -4(PC)
|
||||
| .else
|
||||
| stb TMP0, -1(PC)
|
||||
| .endif
|
||||
| addis PC, TMP3, -(BCBIAS_J*4 >> 16)
|
||||
| .if ENDIAN_LE
|
||||
| stb TMP1, 0(PC)
|
||||
| .else
|
||||
| stb TMP1, 3(PC)
|
||||
| .endif
|
||||
| b <1
|
||||
break;
|
||||
|
||||
@ -4924,7 +4978,6 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
||||
| addi RA, RA, 8
|
||||
| blt <2
|
||||
|3:
|
||||
| addi BASEP4, BASE, 4
|
||||
| ins_next
|
||||
|
|
||||
|5: // Copy all varargs.
|
||||
@ -4957,6 +5010,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
||||
| add RA, BASE, RA
|
||||
| add RC, BASE, SAVE0
|
||||
| subi TMP3, BASE, 8
|
||||
| addi BASEP4, BASE, 4
|
||||
| b <6
|
||||
break;
|
||||
|
||||
@ -5082,6 +5136,9 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
||||
|.if DUALNUM
|
||||
| // Integer loop.
|
||||
| lwzux2 TMP1, CARG1, RA, BASE
|
||||
if (vk) {
|
||||
| mtxer ZERO
|
||||
}
|
||||
| cmplw cr0, TMP1, TISNUM
|
||||
if (vk) {
|
||||
| lwz CARG3, FORL_STEP*8+WORD_LO(RA)
|
||||
@ -5097,7 +5154,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
||||
|.endif
|
||||
| cmpwi cr6, CARG3, 0
|
||||
| lwz CARG2, FORL_STOP*8+WORD_LO(RA)
|
||||
| bso >6
|
||||
| bso >2
|
||||
|4:
|
||||
| stw CARG1, FORL_IDX*8+WORD_LO(RA)
|
||||
} else {
|
||||
@ -5139,11 +5196,6 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
||||
|5: // Invert check for negative step.
|
||||
| cmpw CARG2, CARG1
|
||||
| b <1
|
||||
if (vk) {
|
||||
|6: // Potential overflow.
|
||||
| checkov TMP0, <4 // Ignore unrelated overflow.
|
||||
| b <2
|
||||
}
|
||||
|.endif
|
||||
if (vk) {
|
||||
|.if DUALNUM
|
||||
@ -5285,7 +5337,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
|
||||
| // Traces on PPC don't store the trace number, so use 0.
|
||||
| stw ZERO, DISPATCH_GL(vmstate)(DISPATCH)
|
||||
| lwzx TRACE:TMP2, TMP1, RD
|
||||
| clrso TMP1
|
||||
| mtxer ZERO
|
||||
| lp TMP2, TRACE:TMP2->mcode
|
||||
| stw BASE, DISPATCH_GL(jit_base)(DISPATCH)
|
||||
| mtctr TMP2
|
||||
|
Loading…
Reference in New Issue
Block a user