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ARM64: Reorganize operand extension definitions.

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This commit is contained in:
Mike Pall 2016-12-07 18:38:32 +01:00
parent 48b00297b3
commit 2ac2cd4699
2 changed files with 9 additions and 6 deletions
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8
src/lj_asm_arm64.h
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@ -277,7 +277,7 @@ static void asm_fusexref(ASMState *as, A64Ins ai, Reg rd, IRRef ref,
if (!emit_checkofs(ai, ofs)) { if (!emit_checkofs(ai, ofs)) {
Reg rn = ra_alloc1(as, ref, allow); Reg rn = ra_alloc1(as, ref, allow);
Reg rm = ra_allock(as, ofs, rset_exclude(allow, rn)); Reg rm = ra_allock(as, ofs, rset_exclude(allow, rn));
emit_dnm(as, (ai ^ 0x01204800), rd, rn, rm); emit_dnm(as, (ai^A64I_LS_R)|A64I_LS_UXTWx, rd, rn, rm);
return; return;
} }
} }
@ -936,7 +936,7 @@ static void asm_ahuvload(ASMState *as, IRIns *ir)
ra_allock(as, (irt_toitype(ir->t) << 15) | 0x7fff, allow), tmp); ra_allock(as, (irt_toitype(ir->t) << 15) | 0x7fff, allow), tmp);
} }
if (ofs & FUSE_REG) if (ofs & FUSE_REG)
emit_dnm(as, (A64I_LDRx^A64I_LS_R)|A64I_LS_UXTWx, tmp, idx, (ofs & 31)); emit_dnm(as, (A64I_LDRx^A64I_LS_R)|A64I_LS_UXTWx|A64I_LS_SH, tmp, idx, (ofs & 31));
else else
emit_lso(as, A64I_LDRx, tmp, idx, ofs); emit_lso(as, A64I_LDRx, tmp, idx, ofs);
} }
@ -951,7 +951,7 @@ static void asm_ahustore(ASMState *as, IRIns *ir)
src = ra_alloc1(as, ir->op2, RSET_FPR); src = ra_alloc1(as, ir->op2, RSET_FPR);
idx = asm_fuseahuref(as, ir->op1, &ofs, allow, A64I_STRd); idx = asm_fuseahuref(as, ir->op1, &ofs, allow, A64I_STRd);
if (ofs & FUSE_REG) if (ofs & FUSE_REG)
emit_dnm(as, (A64I_STRd^A64I_LS_R)|A64I_LS_UXTWx, (src & 31), idx, (ofs &31)); emit_dnm(as, (A64I_STRd^A64I_LS_R)|A64I_LS_UXTWx|A64I_LS_SH, (src & 31), idx, (ofs &31));
else else
emit_lso(as, A64I_STRd, (src & 31), idx, ofs); emit_lso(as, A64I_STRd, (src & 31), idx, ofs);
} else { } else {
@ -968,7 +968,7 @@ static void asm_ahustore(ASMState *as, IRIns *ir)
idx = asm_fuseahuref(as, ir->op1, &ofs, rset_exclude(allow, type), idx = asm_fuseahuref(as, ir->op1, &ofs, rset_exclude(allow, type),
A64I_STRx); A64I_STRx);
if (ofs & FUSE_REG) if (ofs & FUSE_REG)
emit_dnm(as, (A64I_STRx^A64I_LS_R)|A64I_LS_UXTWx, tmp, idx, (ofs & 31)); emit_dnm(as, (A64I_STRx^A64I_LS_R)|A64I_LS_UXTWx|A64I_LS_SH, tmp, idx, (ofs & 31));
else else
emit_lso(as, A64I_STRx, tmp, idx, ofs); emit_lso(as, A64I_STRx, tmp, idx, ofs);
if (ra_hasreg(src)) { if (ra_hasreg(src)) {

7
src/lj_target_arm64.h
View File

@ -147,8 +147,11 @@ typedef enum A64Ins {
A64I_LS_U = 0x01000000, A64I_LS_U = 0x01000000,
A64I_LS_S = 0x00800000, A64I_LS_S = 0x00800000,
A64I_LS_R = 0x01200800, A64I_LS_R = 0x01200800,
A64I_LS_UXTWx = 0x00005000, A64I_LS_SH = 0x00001000,
A64I_LS_LSLx = 0x00007000, A64I_LS_UXTWx = 0x00004000,
A64I_LS_SXTWx = 0x0000c000,
A64I_LS_SXTXx = 0x0000e000,
A64I_LS_LSLx = 0x00006000,
A64I_ADDw = 0x0b000000, A64I_ADDw = 0x0b000000,
A64I_ADDx = 0x8b000000, A64I_ADDx = 0x8b000000,