From e3d5b218d3ae1f4804abdfb6caf8d383e160f5db Mon Sep 17 00:00:00 2001 From: Mike Pall Date: Wed, 12 Feb 2014 00:44:14 +0100 Subject: [PATCH 1/4] Fix quoting in xedkbuild.bat (again). --- src/xedkbuild.bat | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/xedkbuild.bat b/src/xedkbuild.bat index adbce8be..240ec878 100644 --- a/src/xedkbuild.bat +++ b/src/xedkbuild.bat @@ -54,8 +54,8 @@ buildvm -m folddef -o lj_folddef.h lj_opt_fold.c @if errorlevel 1 goto :BAD @rem ---- Cross compiler ---- -@set "LJCOMPILE=%XEDK%\bin\win32\cl /nologo /c /MT /O2 /W3 /GF /Gm- /GR- /GS- /Gy /openmp- /D_CRT_SECURE_NO_DEPRECATE /DNDEBUG /D_XBOX /D_LIB /DLUAJIT_USE_SYSMALLOC" -@set "LJLIB=%XEDK%\bin\win32\lib /nologo" +@set LJCOMPILE="%XEDK%\bin\win32\cl" /nologo /c /MT /O2 /W3 /GF /Gm- /GR- /GS- /Gy /openmp- /D_CRT_SECURE_NO_DEPRECATE /DNDEBUG /D_XBOX /D_LIB /DLUAJIT_USE_SYSMALLOC +@set LJLIB="%XEDK%\bin\win32\lib" /nologo @set "INCLUDE=%XEDK%\include\xbox" @if "%1" neq "debug" goto :NODEBUG From 2bc63bb6affdb378c1698bd0f97bacb286a61a6f Mon Sep 17 00:00:00 2001 From: Mike Pall Date: Wed, 19 Feb 2014 17:09:22 +0100 Subject: [PATCH 2/4] Prevent BASE register coalescing if parent uses IR_RETF. --- src/lj_asm_arm.h | 7 +++++-- src/lj_asm_mips.h | 5 +++-- src/lj_asm_ppc.h | 5 +++-- src/lj_asm_x86.h | 5 +++-- 4 files changed, 14 insertions(+), 8 deletions(-) diff --git a/src/lj_asm_arm.h b/src/lj_asm_arm.h index 0ab3a567..72f205d9 100644 --- a/src/lj_asm_arm.h +++ b/src/lj_asm_arm.h @@ -493,6 +493,7 @@ static void asm_retf(ASMState *as, IRIns *ir) int32_t delta = 1+bc_a(*((const BCIns *)pc - 1)); as->topslot -= (BCReg)delta; if ((int32_t)as->topslot < 0) as->topslot = 0; + irt_setmark(IR(REF_BASE)->t); /* Children must not coalesce with BASE reg. */ /* Need to force a spill on REF_BASE now to update the stack slot. */ emit_lso(as, ARMI_STR, base, RID_SP, ra_spill(as, IR(REF_BASE))); emit_setgl(as, base, jit_base); @@ -2102,7 +2103,8 @@ static void asm_head_root_base(ASMState *as) IRIns *ir; asm_head_lreg(as); ir = IR(REF_BASE); - if (ra_hasreg(ir->r) && rset_test(as->modset, ir->r)) ra_spill(as, ir); + if (ra_hasreg(ir->r) && (rset_test(as->modset, ir->r) || irt_ismarked(ir->t))) + ra_spill(as, ir); ra_destreg(as, ir, RID_BASE); } @@ -2112,7 +2114,8 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) IRIns *ir; asm_head_lreg(as); ir = IR(REF_BASE); - if (ra_hasreg(ir->r) && rset_test(as->modset, ir->r)) ra_spill(as, ir); + if (ra_hasreg(ir->r) && (rset_test(as->modset, ir->r) || irt_ismarked(ir->t))) + ra_spill(as, ir); if (ra_hasspill(irp->s)) { rset_clear(allow, ra_dest(as, ir, allow)); } else { diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h index f5b0bab6..e5c67b53 100644 --- a/src/lj_asm_mips.h +++ b/src/lj_asm_mips.h @@ -394,6 +394,7 @@ static void asm_retf(ASMState *as, IRIns *ir) int32_t delta = 1+bc_a(*((const BCIns *)pc - 1)); as->topslot -= (BCReg)delta; if ((int32_t)as->topslot < 0) as->topslot = 0; + irt_setmark(IR(REF_BASE)->t); /* Children must not coalesce with BASE reg. */ emit_setgl(as, base, jit_base); emit_addptr(as, base, -8*delta); asm_guard(as, MIPSI_BNE, RID_TMP, @@ -1723,7 +1724,7 @@ static void asm_head_root_base(ASMState *as) if (as->loopinv) as->mctop--; if (ra_hasreg(r)) { ra_free(as, r); - if (rset_test(as->modset, r)) + if (rset_test(as->modset, r) || irt_ismarked(ir->t)) ir->r = RID_INIT; /* No inheritance for modified BASE register. */ if (r != RID_BASE) emit_move(as, r, RID_BASE); @@ -1738,7 +1739,7 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) if (as->loopinv) as->mctop--; if (ra_hasreg(r)) { ra_free(as, r); - if (rset_test(as->modset, r)) + if (rset_test(as->modset, r) || irt_ismarked(ir->t)) ir->r = RID_INIT; /* No inheritance for modified BASE register. */ if (irp->r == r) { rset_clear(allow, r); /* Mark same BASE register as coalesced. */ diff --git a/src/lj_asm_ppc.h b/src/lj_asm_ppc.h index 57fd2513..e1a496a7 100644 --- a/src/lj_asm_ppc.h +++ b/src/lj_asm_ppc.h @@ -381,6 +381,7 @@ static void asm_retf(ASMState *as, IRIns *ir) int32_t delta = 1+bc_a(*((const BCIns *)pc - 1)); as->topslot -= (BCReg)delta; if ((int32_t)as->topslot < 0) as->topslot = 0; + irt_setmark(IR(REF_BASE)->t); /* Children must not coalesce with BASE reg. */ emit_setgl(as, base, jit_base); emit_addptr(as, base, -8*delta); asm_guardcc(as, CC_NE); @@ -1901,7 +1902,7 @@ static void asm_head_root_base(ASMState *as) Reg r = ir->r; if (ra_hasreg(r)) { ra_free(as, r); - if (rset_test(as->modset, r)) + if (rset_test(as->modset, r) || irt_ismarked(ir->t)) ir->r = RID_INIT; /* No inheritance for modified BASE register. */ if (r != RID_BASE) emit_mr(as, r, RID_BASE); @@ -1915,7 +1916,7 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) Reg r = ir->r; if (ra_hasreg(r)) { ra_free(as, r); - if (rset_test(as->modset, r)) + if (rset_test(as->modset, r) || irt_ismarked(ir->t)) ir->r = RID_INIT; /* No inheritance for modified BASE register. */ if (irp->r == r) { rset_clear(allow, r); /* Mark same BASE register as coalesced. */ diff --git a/src/lj_asm_x86.h b/src/lj_asm_x86.h index 98a08d97..fda911e5 100644 --- a/src/lj_asm_x86.h +++ b/src/lj_asm_x86.h @@ -647,6 +647,7 @@ static void asm_retf(ASMState *as, IRIns *ir) int32_t delta = 1+bc_a(*((const BCIns *)pc - 1)); as->topslot -= (BCReg)delta; if ((int32_t)as->topslot < 0) as->topslot = 0; + irt_setmark(IR(REF_BASE)->t); /* Children must not coalesce with BASE reg. */ emit_setgl(as, base, jit_base); emit_addptr(as, base, -8*delta); asm_guardcc(as, CC_NE); @@ -2481,7 +2482,7 @@ static void asm_head_root_base(ASMState *as) Reg r = ir->r; if (ra_hasreg(r)) { ra_free(as, r); - if (rset_test(as->modset, r)) + if (rset_test(as->modset, r) || irt_ismarked(ir->t)) ir->r = RID_INIT; /* No inheritance for modified BASE register. */ if (r != RID_BASE) emit_rr(as, XO_MOV, r, RID_BASE); @@ -2495,7 +2496,7 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow) Reg r = ir->r; if (ra_hasreg(r)) { ra_free(as, r); - if (rset_test(as->modset, r)) + if (rset_test(as->modset, r) || irt_ismarked(ir->t)) ir->r = RID_INIT; /* No inheritance for modified BASE register. */ if (irp->r == r) { rset_clear(allow, r); /* Mark same BASE register as coalesced. */ From 1994a2453e91beafcc78e12051b44ccc7a41bf7b Mon Sep 17 00:00:00 2001 From: Mike Pall Date: Wed, 19 Feb 2014 22:05:34 +0100 Subject: [PATCH 3/4] FFI: Disallow nested VLS. --- src/lj_cparse.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/lj_cparse.c b/src/lj_cparse.c index 767ac179..6ffe16a2 100644 --- a/src/lj_cparse.c +++ b/src/lj_cparse.c @@ -1258,7 +1258,7 @@ static void cp_struct_layout(CPState *cp, CTypeID sid, CTInfo sattr) sinfo |= (info & (CTF_QUAL|CTF_VLA)); /* Merge pseudo-qualifiers. */ /* Check for size overflow and determine alignment. */ - if (sz >= 0x20000000u || bofs + csz < bofs) { + if (sz >= 0x20000000u || bofs + csz < bofs || (info & CTF_VLA)) { if (!(sz == CTSIZE_INVALID && ctype_isarray(info) && !(sinfo & CTF_UNION))) cp_err(cp, LJ_ERR_FFI_INVSIZE); From 998651fcdafc8b6f3d922e1e60864fec83409118 Mon Sep 17 00:00:00 2001 From: Mike Pall Date: Thu, 20 Feb 2014 04:24:50 +0100 Subject: [PATCH 4/4] Don't purge modified function from stack slots in BC_RET. --- src/lj_record.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/lj_record.c b/src/lj_record.c index f98b0a4c..0dfc10b3 100644 --- a/src/lj_record.c +++ b/src/lj_record.c @@ -701,7 +701,7 @@ void lj_record_ret(jit_State *J, BCReg rbase, ptrdiff_t gotresults) (!frame_islua(frame) || (J->parent == 0 && !bc_isret(bc_op(J->cur.startins))))) { /* NYI: specialize to frame type and return directly, not via RET*. */ - for (i = -1; i < (ptrdiff_t)rbase; i++) + for (i = 0; i < (ptrdiff_t)rbase; i++) J->base[i] = 0; /* Purge dead slots. */ J->maxslot = rbase + (BCReg)gotresults; rec_stop(J, LJ_TRLINK_RETURN, 0); /* Return to interpreter. */