Treat IR_INTRN as potential load with respect to DSE

This commit is contained in:
fsfod 2016-03-29 11:15:28 +01:00
parent f7331e9464
commit 275d0dcdd7
2 changed files with 22 additions and 1 deletions

View File

@ -827,7 +827,7 @@ TRef LJ_FASTCALL lj_opt_dse_xstore(jit_State *J)
IRIns *ir;
/* Check for any intervening guards or any XLOADs (no AA performed). */
for (ir = IR(J->cur.nins-1); ir > store; ir--)
if (irt_isguard(ir->t) || ir->o == IR_XLOAD)
if (irt_isguard(ir->t) || ir->o == IR_XLOAD || ir->o == IR_INTRN)
goto doemit; /* No elimination possible. */
/* Remove redundant store from chain and replace with NOP. */
*refp = store->prev;

View File

@ -712,6 +712,27 @@ end
assert_jit(brand, testcpuid_brand)
end)
it("no dse between intrinsic", function()
assert_cdef([[int32_t volatileload(int32_t* iptr) __mcode("8brMI");]], "volatileload")
local numptr = ffi.new("int32_t[1]", 0)
local volatileload = ffi.C.volatileload
local function testdse()
assert(volatileload)
local sum = 0
numptr[0] = 0
numptr[0] = 1
sum = volatileload(numptr)
numptr[0] = 2
sum = sum + volatileload(numptr)
return sum
end
assert_jit(3, testdse)
end)
end)
context("__reglist", function()