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https://github.com/LuaJIT/LuaJIT.git
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ARM: Drop hard-fp variants of floor/ceil/trunc.
Soft-fp variants are faster on a Cortex-A9. Duh.
This commit is contained in:
Mike Pall
parent
894d2d6ef4
commit
2621617a92
@ -1574,15 +1574,23 @@ static void asm_callid(ASMState *as, IRIns *ir, IRCallID id)
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static void asm_callround(ASMState *as, IRIns *ir, int id)
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{
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/* The modified regs must match with the *.dasc implementation. */
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RegSet drop = RID2RSET(RID_D0)|RID2RSET(RID_D1)|RID2RSET(RID_D2)|
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RID2RSET(RID_R0)|RID2RSET(RID_R1);
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if (ra_hasreg(ir->r)) rset_clear(drop, ir->r);
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RegSet drop = RID2RSET(RID_R0)|RID2RSET(RID_R1)|RID2RSET(RID_R2)|
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RID2RSET(RID_R3)|RID2RSET(RID_R12);
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RegSet of;
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Reg dest, src;
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ra_evictset(as, drop);
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ra_destreg(as, ir, RID_FPRET);
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emit_call(as, id == IRFPM_FLOOR ? (void *)lj_vm_floor_hf :
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id == IRFPM_CEIL ? (void *)lj_vm_ceil_hf :
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(void *)lj_vm_trunc_hf);
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ra_leftov(as, RID_D0, ir->op1);
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dest = ra_dest(as, ir, RSET_FPR);
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emit_dnm(as, ARMI_VMOV_D_RR, RID_RETLO, RID_RETHI, (dest & 15));
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emit_call(as, id == IRFPM_FLOOR ? (void *)lj_vm_floor_sf :
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id == IRFPM_CEIL ? (void *)lj_vm_ceil_sf :
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(void *)lj_vm_trunc_sf);
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/* Workaround to protect argument GPRs from being used for remat. */
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of = as->freeset;
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as->freeset &= ~RSET_RANGE(RID_R0, RID_R1+1);
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as->cost[RID_R0] = as->cost[RID_R1] = REGCOST(~0u, ASMREF_L);
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src = ra_alloc1(as, ir->op1, RSET_FPR); /* May alloc GPR to remat FPR. */
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as->freeset |= (of & RSET_RANGE(RID_R0, RID_R1+1));
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emit_dnm(as, ARMI_VMOV_RR_D, RID_R0, RID_R1, (src & 15));
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}
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#endif
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@ -56,8 +56,8 @@ LJ_ASMF void lj_vm_exit_interp(void);
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LJ_ASMF double lj_vm_floor(double);
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LJ_ASMF double lj_vm_ceil(double);
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#if LJ_TARGET_ARM
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LJ_ASMF double lj_vm_floor_hf(double);
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LJ_ASMF double lj_vm_ceil_hf(double);
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LJ_ASMF double lj_vm_floor_sf(double);
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LJ_ASMF double lj_vm_ceil_sf(double);
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#endif
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#endif
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#if defined(LUAJIT_NO_LOG2) || LJ_TARGET_X86ORX64
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@ -81,7 +81,7 @@ LJ_ASMF void lj_vm_powi_sse(void);
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#else
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LJ_ASMF double lj_vm_trunc(double);
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#if LJ_TARGET_ARM
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LJ_ASMF double lj_vm_trunc_hf(double);
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LJ_ASMF double lj_vm_trunc_sf(double);
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#endif
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#endif
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LJ_ASMF double lj_vm_powi(double, int32_t);
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115
src/vm_arm.dasc
115
src/vm_arm.dasc
@ -1368,14 +1368,8 @@ static void build_subroutines(BuildCtx *ctx)
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| movmi CARG1, #0x80000000
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| bmi <1
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|4:
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|.if HFABI
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| vmov d0, CARG1, CARG2
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| bl ->vm_..func.._hf
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| b ->fff_resd
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|.else
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| bl ->vm_..func
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| bl ->vm_..func.._sf
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| b ->fff_restv
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|.endif
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|.endmacro
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| math_round floor
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@ -2221,52 +2215,9 @@ static void build_subroutines(BuildCtx *ctx)
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|//
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|// double lj_vm_floor/ceil/trunc(double x);
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|.macro vm_round, func, hf
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|.if FPU
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|.if hf == 0
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| vmov d0, CARG1, CARG2
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| vldr d2, <8 // 2^52
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|.else
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| vldr d2, <8 // 2^52
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|.if hf == 1
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| vmov CARG1, CARG2, d0
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|.endif
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| vabs.f64 d1, d0
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| vcmp.f64 d1, d2 // |x| >= 2^52 or NaN?
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| vmrs
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|.if "func" == "trunc"
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| bxpl lr // Return argument unchanged.
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| vadd.f64 d0, d1, d2
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| vsub.f64 d0, d0, d2 // (|x| + 2^52) - 2^52
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| vldr d2, <9 // +1.0
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| vcmp.f64 d1, d0 // |x| < result: subtract +1.0
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| vmrs
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| vsubmi.f64 d0, d0, d2
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| cmp CARG2, #0
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| vnegmi.f64 d0, d0 // Merge sign bit back in.
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|.else
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| vadd.f64 d1, d1, d2
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| bxpl lr // Return argument unchanged.
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| cmp CARG2, #0
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| vsub.f64 d1, d1, d2 // (|x| + 2^52) - 2^52
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| vldr d2, <9 // +1.0
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| vnegmi.f64 d1, d1 // Merge sign bit back in.
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|.if "func" == "floor"
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| vcmp.f64 d0, d1 // x < result: subtract +1.0.
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| vmrs
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| vsubmi.f64 d0, d1, d2
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|.else
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| vcmp.f64 d1, d0 // x > result: add +1.0.
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| vmrs
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| vaddmi.f64 d0, d1, d2
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|.endif
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| vmovpl.f64 d0, d1
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|.endif
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|.if hf == 0
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| vmov CARG1, CARG2, d0
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|.endif
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| bx lr
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|.else
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| lsl CARG3, CARG2, #1
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| adds RB, CARG3, #0x00200000
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| bpl >2 // |x| < 1?
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@ -2286,6 +2237,9 @@ static void build_subroutines(BuildCtx *ctx)
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|.else
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| bics CARG3, CARG3, CARG2, asr #31 // iszero = ((ztest & ~signmask) == 0)
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|.endif
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|.if hf == 1
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| vmoveq d0, CARG1, CARG2
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|.endif
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| bxeq lr // iszero: done.
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| mvn CARG4, #1
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| cmp RB, #0
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@ -2294,6 +2248,9 @@ static void build_subroutines(BuildCtx *ctx)
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| add RB, RB, #32
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| subs CARG1, CARG1, CARG4, lsl RB // lo = lo-lomask
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| sbc CARG2, CARG2, CARG3 // hi = hi-himask+carry
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|.if hf == 1
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| vmov d0, CARG1, CARG2
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|.endif
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| bx lr
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|2: // |x| < 1:
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@ -2308,45 +2265,41 @@ static void build_subroutines(BuildCtx *ctx)
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| and CARG2, CARG2, #0x80000000
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| ldrne CARG4, <9 // hi = sign(x) | (iszero ? 0.0 : 1.0)
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| orrne CARG2, CARG2, CARG4
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| bx lr
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|.if hf == 1
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| vmov d0, CARG1, CARG2
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|.endif
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| bx lr
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|.endmacro
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|
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|.if FPU
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|.align 8
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|9:
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| .long 0, 0x3ff00000 // +1.0
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|8:
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| .long 0, 0x43300000 // 2^52
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|.else
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|9:
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| .long 0x3ff00000 // hiword(+1.0)
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|.endif
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|->vm_floor:
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|.if not HFABI
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| vm_round floor, 0
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|.endif
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|->vm_floor_hf:
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|.if FPU
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|.if HFABI
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| vm_round floor, 1
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|.endif
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|->vm_floor_sf:
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| vm_round floor, 0
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|
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|->vm_ceil:
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|.if not HFABI
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| vm_round ceil, 0
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|.endif
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|->vm_ceil_hf:
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|.if FPU
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|.if HFABI
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| vm_round ceil, 1
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|.endif
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|->vm_ceil_sf:
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| vm_round ceil, 0
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|
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|->vm_trunc:
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|.if JIT and not HFABI
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|.macro vm_trunc, hf
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|.if JIT
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|.if hf == 1
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| vmov CARG1, CARG2, d0
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|.endif
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| lsl CARG3, CARG2, #1
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| adds RB, CARG3, #0x00200000
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| andpl CARG2, CARG2, #0x80000000 // |x| < 1? hi = sign(x), lo = 0.
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| movpl CARG1, #0
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|.if hf == 1
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| vmovpl d0, CARG1, CARG2
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|.endif
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| bxpl lr
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| mvn CARG4, #0x3cc
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| subs RB, CARG4, RB, asr #21 // 2^0: RB = 51, 2^51: RB = 0.
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@ -2355,13 +2308,19 @@ static void build_subroutines(BuildCtx *ctx)
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| and CARG1, CARG1, CARG4, lsl RB // lo &= lomask
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| subs RB, RB, #32
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| andpl CARG2, CARG2, CARG4, lsl RB // |x| <= 2^20: hi &= himask
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|.if hf == 1
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| vmov d0, CARG1, CARG2
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|.endif
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| bx lr
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|.endif
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|.endmacro
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|
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|->vm_trunc_hf:
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|.if JIT and FPU
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| vm_round trunc, 1
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|->vm_trunc:
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|.if HFABI
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| vm_trunc 1
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|.endif
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|->vm_trunc_sf:
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| vm_trunc 0
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|
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| // double lj_vm_mod(double dividend, double divisor);
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|->vm_mod:
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@ -2369,7 +2328,9 @@ static void build_subroutines(BuildCtx *ctx)
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| // Special calling convention. Also, RC (r11) is not preserved.
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| vdiv.f64 d0, d6, d7
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| mov RC, lr
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| bl ->vm_floor_hf
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| vmov CARG1, CARG2, d0
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| bl ->vm_floor_sf
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| vmov d0, CARG1, CARG2
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| vmul.f64 d0, d0, d7
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| mov lr, RC
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| vsub.f64 d6, d6, d0
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@ -2377,7 +2338,7 @@ static void build_subroutines(BuildCtx *ctx)
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|.else
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| push {r0, r1, r2, r3, r4, lr}
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| bl extern __aeabi_ddiv
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| bl ->vm_floor
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| bl ->vm_floor_sf
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| ldrd CARG34, [sp, #8]
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| bl extern __aeabi_dmul
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| ldrd CARG34, [sp]
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