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Improve readability of a load instruction

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This commit is contained in:
Gustavo Serra Scalet 2017-08-30 13:25:29 -03:00
parent 36237e70e1
commit 13b769e3ad
1 changed files with 2 additions and 3 deletions
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5
src/vm_ppc64.dasc
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@ -1488,9 +1488,8 @@ static void build_subroutines(BuildCtx *ctx)
|.endif
| lbz TMP0, L:CARG1->status
| ld TMP1, L:CARG1->cframe
| la TMP3, L:CARG1->base
| ld TMP2, 0(TMP3)
| ld CARG2, 8(TMP3)
| ld TMP2, L:CARG1->base
| ld CARG2, L:CARG1->top
| cmpldi cr0, TMP0, LUA_YIELD
| add TMP3, CARG2, TMP0
| cmpldi cr1, TMP1, 0